IP Library Granted Patent US 11,653,463
Granted Patent B2
US 11,653,463 · App. 16/899,972 · Granted May 16, 2023

Removable memory card with efficient card lock mechanism and pads layout

Inventors: Yoseph Pinto (Tel Aviv, IL); Michael Lavrentiev (San Jose, CA)
Assignee: Western Digital Technologies, Inc.
H05K5/026H05K5/0208H05K5/0247
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Quick Facts
Patent No.
US 11,653,463
App. No.
16/899,972
Granted
May 16, 2023
Kind
B2
Abstract

A memory card is provided with various pad layouts to prevent a data signal pad from contacting a power contact in a host during insertion and removal of the memory card. The memory card can have a form factor and features that accommodate a relatively-large memory with relatively-high performance and accompanying thermal conditions. An efficient card lock mechanism is also provided.

Claims (37)

1. A memory card comprising:

a top surface; and

a bottom surface opposite the top surface, wherein:

the bottom surface comprises a plurality of pads arranged in a first row, a second row, and a third row;

the first row of pads is located at a front of the memory card and comprises:

at least one power supply pad configured to supply power received from a plurality of power contacts of a host to internal circuits in the memory card, wherein the at least one power supply pad comprises all of the power supply pads of the memory card;

at least one card type detection pad configured to receive a card type detection signal from at least one card type detection contact of the host;

a card insertion/removal detection pad configured to receive a card insertion/removal detection signal from a card insertion/removal detection contact of the host; and

a plurality of sideband signal pads configured to receive sideband signals from a plurality of sideband signal contacts of the host; and

the second row and the third row of pads are located rearward of the first row of pads and comprise a plurality of differential signal pads, wherein the plurality of sideband signal pads and the plurality of differential signal pads are aligned on the bottom surface to avoid contacting the at least one card type detection contact, the card insertion/removal detection contact, the plurality of power contacts, and one or more ground pads of the host during insertion and removal of the memory card.

2. The memory card of claim 1 , wherein the top surface comprises a metal plate.

3. The memory card of claim 1 , further comprising a card locking mechanism.

4. A memory card comprising:

a top surface;

a bottom surface opposite the top surface, wherein:

the bottom surface comprises a plurality of pads arranged in a first row, a second row, and a third row;

the first row of pads is located at a front of the memory card and comprises:

at least one power supply pad configured to supply power received from a plurality of power contacts of a host to internal circuits in the memory card, wherein the at least one power supply pad comprises all of the power supply pads of the memory card;

at least one card type detection pad configured to receive a card type detection signal from at least one card type detection contact of the host;

a card insertion/removal detection pad configured to receive a card insertion/removal detection signal from a card insertion/removal detection contact of the host; and

a plurality of sideband signal pads configured to receive sideband signals from a plurality of sideband signal contacts of the host; and

the second row and the third row of pads are located rearward of the first row of pads and comprise a plurality of differential signal pads, wherein the plurality of sideband signal pads and the plurality of differential signal pads are aligned on the bottom surface to avoid contacting the at least one card type detection contact, the card insertion/removal detection contact, the plurality of power contacts, and one or more ground pads of the host during insertion and removal of the memory card; and

card locking means.

5. A memory card comprising:

a top surface; and

a bottom surface opposite the top surface;

wherein:

the bottom surface comprises a plurality of pads arranged in a first row, a second row, and a third row:

the first row of pads is located at a front of the memory card and comprises:

at least one power supply pad configured to supply power received from a plurality of power contacts of a host to internal circuits in the memory card, wherein the at least one power supply pad comprises all of the power supply pads of the memory card;

at least one card type detection pad configured to receive a card type detection signal from at least one card type detection contact of the host;

a card insertion/removal detection pad configured to receive a card insertion/removal detection signal from a card insertion/removal detection contact of the host; and

a plurality of sideband signal pads configured to receive sideband signals from a plurality of sideband signal contacts of the host; and

the second row and the third row of pads are located rearward of the first row of pads and comprise a plurality of differential signal pads, wherein the plurality of sideband signal pads and the plurality of differential signal pads are aligned on the bottom surface to avoid contacting the at least one card type detection contact, the card insertion/removal detection contact, the plurality of power contacts, and one or more ground pads of the host during insertion and removal of the memory card;

wherein a ratio of a length of the memory card to a width of the memory card is about 15:11.

6. The memory card of claim 5 , wherein the top surface comprises a metal plate.

7. The memory card of claim 5 , further comprising a card locking mechanism.

Assignments (10)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 053926 FRAME 0446 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
SECURITY INTEREST Recorded Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2020
From: PINTO, YOSEPH; LAVRENTIEV, MICHAEL
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 052927/0291 →
Continuity (2)
Provisional Application 63027730 · May 20, 2020
Related Publication 20210368636A1 · Nov 25, 2021
Cited By (3)
US 12,277,465 US 12,580,007 US 12,614,047