IP Library Granted Patent US 11,177,012
Granted Patent B1
US 11,177,012 · App. 16/910,905 · Granted Nov 16, 2021

Fast copy through controller

Inventors: Dudy David Avraham (Even Yehuda, IL); Ran Zamir (Ramat Gan, IL)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G11C29/024G11C29/42H03M13/235H03M13/29
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Quick Facts
Patent No.
US 11,177,012
App. No.
16/910,905
Granted
Nov 16, 2021
Kind
B1
Abstract

A method and apparatus for a CTC data copy operation, in that modification, and subsequent encoding only affects a small portion of metadata associated with copied data. By modifying and re-encoding only this small portion of metadata, a small portion of the parity data for the copied data requires updating. In embodiments where there are no errors in the read data to be copied (e.g., from an SLC portion of a NAND), decoding, modification, and encoding, may be done in parallel. Because such a small number of metadata bits are modified, in some embodiments, all possible codewords for the parity bits may be predetermined and combined (e.g., by XOR) to update the metadata parity bits.

Claims (67)

1. A data storage device, comprising:

one or more memory devices; and

a controller configured to perform a method for encoding data, the method comprising:

receiving data from the one or more memory devices, the data comprising parity check matrix data, and stored data;

modifying a portion of the parity check matrix data corresponding to metadata associated with the data; and

encoding the stored data with the modified parity check matrix data.

2. The data storage device of claim 1 , wherein the modifying the portion of the parity check data comprises modifying a trailing portion of the parity check data.

3. The data storage device of claim 2 , wherein the encoding the stored data comprises encoding only the portion of the stored data related to the trailing portion of the parity check data.

4. The data storage device of claim 1 , the method further comprising:

receiving a request to move the data from a first type of memory cell of the one or more memory devices to a second type of memory cell of the one or more memory devices;

checking the data for errors; and

decoding and encoding the data in parallel when no errors are found.

5. The data storage device of claim 4 , the method further comprising wherein the first type of memory cell is one of a single layer cell (SLC), multi-layer cell (MLC), a tri-layer cell (TLC), and a quad layer cell (QLC).

6. The data storage device of claim 5 , wherein the second type of memory cell is one of a single layer cell (SLC), multi-layer cell (MLC), a tri-layer cell (TLC), and a quad layer cell (QLC).

7. The data storage device of claim 2 , wherein modifying the parity check matrix data comprises:

calculating a plurality of versions of the parity check matrix data;

selecting at least one of the plurality of versions; and

updating the parity check matrix data with the selected one of the plurality of versions.

8. The data storage device of claim 7 , wherein each one of the plurality represents a version of the parity check matrix data with a different single bit modified.

9. A controller for a data storage device, comprising:

an I/O to one or more memory devices; and

a processor configured to execute a method for encoding data, the method comprising:

receiving a request to move a portion of data, the portion of data comprising data and metadata comprising a first variable and a last variable;

retrieving the portion of data;

modifying the last variable, wherein modifying the last variable comprises:

modifying a portion of a parity check matrix corresponding to the last variable, wherein the parity check matrix comprises a plurality of parity bits; and

encoding the modified portion of the parity check matrix corresponding to the last variable; and

writing the portion of data to the one or more memory devices.

10. The controller of claim 9 , the method further comprising encoding the data with the modified last variable.

11. The controller of claim 10 , wherein the first variable and last variable comprise parity bits.

12. A controller for a data storage device, comprising:

an I/O to one or more memory devices; and

a processor configured to execute a method for encoding data, the method comprising:

receiving a request to move a portion of data, the portion of data comprising data and metadata comprising a first variable and a last variable;

retrieving the portion of data;

modifying the last variable;

generating a base of codewords for the last variable comprising a plurality of codewords representing at least two variants of the modified last variable;

choosing at least two of the at least two variants based on the modifying of the last variable; and

writing the portion of data to the one or more memory devices.

13. The controller of claim 12 , the method further comprising combining the at least two variants.

14. The controller of claim 13 , wherein the combining comprises combining using an exclusive-OR function.

15. A controller for a data storage device, comprising:

an I/O to one or more memory devices; and

a processor configured to execute a method for encoding data, the method comprising:

receiving a request to move a portion of data, the portion of data comprising data and metadata comprising a first variable and a last variable;

retrieving the portion of data;

modifying the last variable;

writing the portion of data to the one or more memory devices;

error checking the portion of data;

and upon a showing of no errors, performing at least a portion of an encoding and a decoding in parallel.

16. The controller of claim 15 , the method further comprising retrieving the portion of data from a single-layer cell of the one or more memory devices.

17. A system for storing data, comprising:

one or more memory means; and

a controller coupled to the one or more memory means, the controller configured to carry out a method for encoding data, the method comprising:

reading a section of data from the one or more memory means, wherein the section of data comprises metadata and data, the metadata comprising a beginning and an end;

modifying a portion of the metadata contiguous with the end of the metadata; and

writing the section of data to the one or more memory means.

18. The system of claim 17 , the method further comprising encoding the data of the section of data with the modified portion of the metadata.

19. The system of claim 17 , the method further comprising:

decoding the section of data upon reading from at least one single-layer cells of the one or more memory means; and

encoding the section of data with the modified portion of the metadata, in parallel with the decoding.

20. The system of claim 17 , the method further comprising:

generating a plurality of codewords, each of the plurality of codewords corresponding to a one-bit modified version of the portion of the metadata;

editing the data of the section of data;

determining from the editing, a subset of the plurality of codewords; and

combining the subset of the plurality of codewords;

wherein the modifying comprises replacing the portion of the metadata with the combined subset of the plurality of codewords.

Assignments (8)
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 053926 FRAME 0446 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
SECURITY INTEREST Recorded Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2020
From: AVRAHAM, DUDY DAVID; ZAMIR, RAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 053035/0176 →
Cited By (16)
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