Completion entry throttling using host memory
Technologies and techniques for use by a data storage controller or similar device for throttling the delivery of completion entries pertaining to the execution of commands by a nonvolatile memory (NVM) device are provided. In an illustrative example, the data storage controller selectively throttles the delivery of completion entries to a host device using uniform delivery intervals to provide for stable delivery of completion entries to the host. In some examples, the throttling is achieved by storing new completion entries in a completion queue of the host while initially setting corresponding indicator bits within the completion entries (e.g. phase tags) to cause the host to ignore the new completion entries as though the new entries were old entries. Later, after a throttling delay interval, the indicator bits are inverted to allow the host to recognize and process the new completion entries. NVMe examples are provided.
1. A hardware data storage controller of a data storage device for use with a host device, the data storage controller comprising:
a processing system configured to:
receive a command from the host device;
generate a value indicative of completion of the command by the data storage device for reporting to the host device within a queue of the host device, the host device configured to process values within the queue that have a corresponding indicator set to indicate that the value has not yet been processed and to ignore other values in the queue;
store the value in the queue of the host device along with an indicator set to indicate to the host device that the host device has already processed the value, even though the host device has not yet processed the value, to thereby prevent the host device from processing the value until the indicator is reset by the data storage controller, and wherein the data storage controller contains an alternate version of the indicator;
wait a time delay interval sufficient to throttle the host device; and
reset the indicator in the queue of the host device following the time delay interval by writing the alternate version of the indicator into the queue of the host device to replace the indicator in the queue, without first reading the indicator from the queue of the host device, to indicate to the host device that the value has not yet been processed to thereby enable the host device to process the value.
2. The hardware data storage controller of claim 1 , wherein the value is a completion entry and the queue is a completion queue configured to store a plurality of completion entries, each having a corresponding indicator and a corresponding alternate version of the indicator.
3. The hardware data storage controller of claim 2 , wherein the time delay interval comprises a time elapsed until a threshold number of un-processed completion entries are stored in the queue before resetting the indicator.
4. The hardware data storage controller of claim 2 , wherein the corresponding indicator of the completion entry is a phase tag and wherein the corresponding alternate version of the indicator is an alternate phase tag.
5. The hardware data storage controller of claim 4 , wherein the processing system is further configured to reset the indicator with an inverted phase tag.
6. The hardware data storage controller of claim 2 , wherein the completion queue is a circular queue and wherein the processing system is further configured to maintain a head pointer, a tail pointer, and a virtual tail pointer that identify selected completion entries within the queue.
7. The hardware data storage controller of claim 6 , wherein the processing system is further configured to:
(a) control the head pointer to identify an earliest entry within the queue that has not yet been processed by the host device and has a corresponding indicator set to indicate that the host device has not yet processed the value;
(b) control the tail pointer to identify an earliest entry within the queue that has not yet been processed by the host device but has a corresponding indicator set to indicate that the host device has processed the value; and
(c) control the virtual tail pointer to identify an earliest entry within the queue that has been processed by the host device and has a corresponding indicator set to indicate that the host device has processed the value.
8. The hardware data storage controller of claim 7 , wherein the processing system is further configured to set the indicators for all intermediate entries in the queue between the tail pointer and the virtual tail pointer to indicate that the host device has not yet processed the entries, with the indicator of the entry corresponding to the tail pointer providing a barrier to prevent the host device from processing the intermediate entries until the indicator of the entry corresponding to the tail pointer is reset.
9. The hardware data storage controller of claim 1 , wherein the processing system is further configured to reset at least one other indicator using a read-modify-write operation to read a current value of the at least one other indicator from the queue, modify the current value, and write the modified value to the queue.
10. The hardware data storage controller of claim 9 , wherein the processing system is further configured to perform the read-modify-write operation using a byte-granularity read-modify-write.
11. The hardware data storage controller of claim 1 , wherein the data storage device is a non-volatile memory (NVM) device, and wherein the processing system is further configured to generate the value indicative of the completion of the command based on information obtained from the NVM device.
12. The hardware data storage controller of claim 1 , wherein the indicator is an indicator byte.
13. A method for use by a data storage controller, comprising:
receiving a command from a host device;
generating a value indicative of completion of the command by the data storage controller for reporting to the host device within a queue of the host device, the host device configured to process values within the queue that have a corresponding indicator set to indicate that the value has not yet been processed and to ignore other values in the queue;
storing the value in the queue of the host device along with an indicator set to indicate to the host device that the host device has already processed the value, even though the host device has not yet processed the value, to thereby prevent the host device from processing the value until the indicator is reset by the data storage controller, and wherein the data storage controller contains an alternate version of the indicator;
waiting a time delay interval sufficient to throttle the host device; and
resetting the indicator in the queue of the host device following the time delay interval to indicate to the host device that the value has not yet been processed to thereby enable the host device to process the value, wherein resetting the indicator comprises writing the alternate version of the indicator into the queue of the host device to replace the indicator in the queue without first reading the indicator from the queue of the host device.
14. The method of claim 13 , wherein storing the value in the queue comprises storing a completion entry in a completion entry queue along with a corresponding indicator.
15. The method of claim 14 , wherein the time delay interval comprises a time elapsed until a threshold number of un-processed completion entries are stored in the queue before resetting the indicator.
16. The method of claim 14 , wherein the corresponding indicator of the completion entry is a phase tag and wherein the corresponding alternate version of the indicator is an alternate phase tag.
17. The method of claim 16 , wherein the corresponding alternate version of the indicator is an inverted phase tag.
18. The method of claim 14 , wherein the completion queue is a circular queue and further comprising maintaining a head pointer, a tail pointer, and a virtual tail pointer that identify selected completion entries within the queue.
19. The method of claim 18 , wherein maintaining the head pointer, the tail pointer, and the virtual tail pointer comprises:
(a) controlling the head pointer to identify an earliest entry within the queue that has not yet been processed by the host device and has a corresponding indicator set to indicate that the host device has not yet processed the value;
(b) controlling the tail pointer to identify an earliest entry within the queue that has not yet been processed by the host device but has a corresponding indicator set to indicate that the host device has processed the value; and
(c) controlling the virtual tail pointer to identify an earliest entry within the queue that has been processed by the host device and has a corresponding indicator set to indicate that the host device has processed the value.
20. The method of claim 19 , wherein storing the value in the queue of the host device along with the indicator further comprises setting the indicators for a set of intermediate entries in the queue between the tail pointer and the virtual tail pointer to indicate that the host device has not yet processed the entries, with the indicator of the entry corresponding to the tail pointer providing a barrier to prevent the host device from processing the intermediate entries until the indicator of the entry corresponding to the tail pointer is reset.
21. The method of claim 13 , further comprising resetting at least one other indicator by performing a read-modify-write operation to read a current value of the at least one other indicator from the queue, modify the current value, and write the modified value to the queue.
22. The method of claim 21 , wherein performing the read-modify-write operation comprises performing a byte-granularity read-modify-write.
23. The method of claim 13 , wherein the data storage controller is a non-volatile memory (NVM) device, and wherein the value indicative of completion of the command is generated based on information obtained from the NVM device.
24. The method of claim 13 , wherein the indicator is an indicator byte.
25. An apparatus for use with a hardware data storage controller, comprising:
means for receiving a command from a host device;
means for generating a value indicative of completion of the command by the data storage controller for reporting to a host device within a queue of the host device, the host device configured to process values within the queue that have a corresponding indicator set to indicate that the value has not yet been processed and to ignore other values in the queue;
means for storing the value in the queue of the host device along with an indicator set to indicate to the host device that the host device has already processed the value, even though the host device has not yet processed the value, to thereby prevent the host device from processing the value until the indicator is subsequently reset by the data storage controller, and wherein the data storage controller contains an alternate version of the indicator;
means for waiting a time delay interval sufficient to throttle the host device; and
means for resetting the indicator in the queue of the host device following the time delay interval to indicate to the host device that the value has not yet been processed to thereby enable the host device to process the value, wherein the means for resetting the indicator comprises means for writing the alternate version of the indicator into the queue of the host device to replace the indicator in the queue without first reading the indicator from the queue of the host device.