Granted Patent B2

US 11,720,664 · App. 16/928,292 · Granted Aug 8, 2023

Inventors: Lovish Singla (Bangalore, IN); Sandeep Singh (Bangalore, IN); Lovleen Arora (Bangalore, IN); Arunkumar Balasubramanian (Bangalore, IN)

Assignee: Western Digital Technologies, Inc.

G06F21/46G06F12/1441G06F21/34G06F21/79G06F2212/2146

Abstract

Claims (70)

1. A method of password protection of defined spaces in a memory device, the method comprising:

receiving a data block from a host device, the data block comprising at least (a) a user-defined current password, (b) a user-defined new password, (c) a password length of the user-defined current password, (d) a password length of the user-defined new password, and (e) a user-defined address range field including a start address and an end address of a defined space in the memory device;

matching the password length of the user-defined current password and a current password length of a current password for the defined space previously stored in the memory device;

comparing the user-defined current password and the current password of the defined space; and

resetting the current password of the defined space with the user-defined new password based on a result of the matching and a result of the comparing.

2. The method of claim 1 , further comprising:

determining a match between the user-defined address range field and a plurality of address range fields of a plurality of defined spaces stored in the memory device; and

accessing the current password stored with an address range field from among the plurality of address range fields, wherein the address range field is of the defined space.

3. The method of claim 2 , further comprising:

replacing the current password with the user-defined new password of the defined space after the resetting step, wherein the resetting step is performed when:

the password length of the user-defined current password matches the current password length of the current password;

the user-defined current password is the same as the stored current password of the defined space; and

the user-defined address range field is determined to be matching with the address range field of the defined space.

4. The method of claim 2 , further comprising setting an error bit stored in a status register in the memory device based on occurrence of at least one of:

the password length of the user-defined current password being different from the current password length of the current password;

the user-defined current password being different from the current password; and

the user-defined address range field determined to be not matching with any address range field from among the plurality of address range fields.

5. The method of claim 1 , wherein the data block further comprises a command register, and wherein a reserved bit of the command register is set to indicate presence of the user-defined address range field of the defined space in the data block.

6. The method of claim 5 , wherein when the reserved bit is set to a first binary value, the current password of the defined space of the memory device is reset, and wherein when the reserved bit is set to a second binary value, the user-defined address range field is discarded and the current password is reset for entire memory space of the memory device.

7. The method of claim 1 , wherein the data block is a first data block, and wherein the method further comprising:

receiving a second data block from the host device for performing a memory access operation within the defined space of the memory device, the second data block comprising a user-defined current password of the defined space, and a user-defined address range field of the defined space;

matching the user-defined current password present in the second data block and the current password of the defined space; and

enabling the memory access operation within the defined space of the memory device when the user-defined current password present in the second data block matches with the current password and the user defined address range field in the another data block is a valid address range field,

wherein the memory access operation is at least one of: a read operation, a write operation, and an erase operation.

8. The method of claim 1 , wherein the memory device is a secure digital (SD) memory card that operates in compliance with an SD standard.

9. A memory device, comprising:

a memory for storing data; and

a controller operatively coupled to the memory via a memory interface, the controller configured to:

receive a data block from a host device, the data block comprising at least (a) a user-defined current password, (b) a user-defined new password, (c) a password length of the user-defined current password, (d) a password length of the user-defined new password, and (e) a user-defined address range field including a start address and an end address of a defined space in the memory device;

match the password length of the user-defined current password and a current password length of a current password for the defined space already stored in the memory;

compare the user-defined current password and the current password of the defined space; and

reset the current password of the defined space with the user-defined new password based on a result of the match and a result of the comparing.

10. The memory device of claim 9 , wherein the memory device is a secure digital (SD) memory device that operates in compliance with an SD standard.

11. The memory device of claim 9 , wherein the controller comprises at least one of:

a command handler for parsing the received data block;

a password retriever for retrieving the current password of the defined space and the current password length of the current password of the defined space from the memory; and

a password authenticator for receiving parsed data block information and configured to:

determine a match between the user-defined address range field a plurality of address range fields of a plurality of defined spaces stored in the memory device, and

matching the password length of the user-defined current password with the current password length of the current password.

12. The memory device of claim 11 , wherein the password authenticator is further configured to:

store the user-defined new password of the defined space in place of the current password in the memory after the reset of the current password, wherein the resetting is performed when:

the password length of the user-defined current password matches the current password length of the current password;

the user-defined current password is the same as the stored current password of the defined space; and

the user-defined address range field is determined to be matching with the address range field of the defined space.

13. The memory device of claim 12 , wherein the password authenticator is configured to set an error bit stored in a status register based on occurrence of at least one of:

the password length of the user-defined current password being different from the current password length of the current password;

the user-defined current password being different from the current password; and

the user-defined address range field determined to be not matching with any address range field from among the plurality of address range fields.

14. The memory device of claim 9 , wherein the data block further comprises a command register, and wherein a reserved bit of the command register is set to indicate presence of the user-defined address range field of the defined space in the data block.

15. The memory device of claim 9 , wherein the data block is a first data block and wherein the controller is further configured to:

receive a second data block from the host device for performing a memory access operation within the defined space of the memory device, the another data block comprising a user-defined current password of the defined space, and a user-defined address range field of the defined space;

match the user-defined current password present in the second data block and the current password of the defined space; and

enable the memory access operation within the defined space of the memory device when the user-defined current password present in the second data block matches with the current password and the user defined address range field in the another data block is a valid address range field.

16. The memory device of claim 15 , wherein the memory access operation is at least one of read, write and erase.

17. A memory card system, comprising:

a memory card comprising a memory for storing data; and

a control means operatively coupled to the memory by way of a memory interface, wherein the control means comprises means for:

receiving a data block via a card interface, wherein the data block comprises at least (a) a user-defined current password, (b) a user-defined new password, (c) a password length of the user-defined current password, (d) a password length of the user-defined new password, and (e) a user-defined address range field including a start address and an end address of a defined space in the memory,

matching the password length of the user-defined current password and a current password length of a current password for the defined space already stored in the memory,

comparing the user-defined current password and the current password of the defined space, and

replacing the current password of the defined space with the user-defined new password based on a result of the match and a result of the comparing.

18. The memory card system of claim 17 , wherein the control means further comprises:

means for storing the user-defined new password of the defined space into the memory after replacing, wherein the replacing is performed when:

the password length of the user-defined current password matches the current password length of the current password,

the user-defined current password is the same as the stored current password of the defined space, and

the user-defined address range field is determined to be matching with the address range field of the defined space.

19. The memory card system of claim 17 , further comprising a host device comprising:

a host processor; and

a host memory having a sequence of instructions stored thereon, wherein execution of the sequence of instructions causes the host processor to generate the data block and transmit the data block from the host device to the memory via a host interface.

20. The memory card system of claim 17 , wherein the memory card is a Secure Digital (SD) memory card and the memory card system operates in compliance with an SD standard.

Assignments (10)

Continuity (1)