IP Library Granted Patent US 11,422,722
Granted Patent B2
US 11,422,722 · App. 16/928,954 · Granted Aug 23, 2022

Intelligent wide port PHY usage

Inventors: Darin Edward Gerhart (Oronoco, MN); Nicholas Edward Ortmeier (Rochester, MN)
Assignee: Western Digital Technologies, Inc.
G06F3/0634G06F3/0625G06F3/0635G06F3/0673G06F3/0679G06F3/0688Y02D10/00
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Quick Facts
Patent No.
US 11,422,722
App. No.
16/928,954
Granted
Aug 23, 2022
Kind
B2
Abstract

A controller of a storage device is described for handling communications with a host device. In some examples, the storage device includes a wide port comprising a plurality of phys. The wide port is configured to receive, via a first phy of the plurality of phys, a signal. The controller is configured to select, based on a respective power factor associated with each respective phy of the plurality of phys and a respective performance factor associated with each respective phy of the plurality of phys, a second phy of the plurality of phys to utilize for performing an operation associated with the received signal. In such examples, the wide port is further configured to perform, using the second phy, the operation associated with the received signal.

Claims (41)

1. A data storage device comprising:

non-volatile memory; and

a controller coupled to the non-volatile memory, wherein the controller is configured to:

receive a signal via a first phy of a plurality of phys for performing an operation;

select a second phy of the plurality of phys to utilize one of a wake up time factor associated with the received signal and a respective weight associated with the received signal; and

perform the operation using the second phy, associated with the received signal.

2. The data storage device of claim 1 , wherein the selecting is based on a respective power factor associated with each respective phy of the plurality of phys and a respective performance factor associated with each respective phy of the plurality of phys.

3. The data storage device of claim 2 , wherein the respective power factor indicates of power consumption needed to perform the operation using the respective phy.

4. The data storage device of claim 3 , wherein the respective power factor indicates an inverse level of power consumption.

5. The data storage device of claim 2 , wherein the respective performance factor indicates a relative amount of time needed to perform the operation using the respective phy.

6. The data storage device of claim 1 , wherein the controller comprises an efficiency determination module.

7. The data storage device of claim 1 , wherein the controller comprises a memory manager.

8. The data storage device of claim 1 , wherein the controller comprises a hardware engine interface.

9. A data storage device, comprising:

non-volatile memory; and

a controller coupled to the non-volatile memory, wherein the controller is configured to:

receive a signal at a first phy of a plurality of phys;

select a second phy of the plurality of phys to utilize for performing an operation associated with the received signal; and

perform, using the second phy, the operation associated with the received signal, wherein a respective power factor comprises a scaled percentage of a respective power value associated with each respective phy of the plurality of phys, and wherein a respective performance factor comprises a scaled percentage of a respective performance value associated with each respective phy of the plurality of phys.

10. The data storage device of claim 9 , wherein the selecting of the second phy is based on the respective power factor associated with each respective phy of the plurality of phys and the respective performance factor associated with each respective phy of the plurality of phys.

11. The data storage device of claim 9 , wherein the controller is further configured to:

for each phy of the plurality of phys:

determine a power mode and a value based on the power mode for the respective phy; and

multiply the power value with the scaled percentage of the respective power value associated with the respective phy to determine the power factor associated with the respective phy; and

select based on the respective power factor associated with each of the respective phys, the second phy.

12. The data storage device of claim 11 , wherein the scaled percentage of the power factor is equal to one hundred percent.

13. The data storage device of claim 11 , wherein the second phy comprises the phy of the plurality of phys with a power factor that has a greatest value.

14. The data storage device of claim 13 , wherein the power mode is one of an active mode, a slumber mode and a partial power mode.

15. The data storage device of claim 14 , wherein the active mode indicates that the respective phy may receive signals from a host device and perform operations, wherein the slumber mode indicates that the respective phy may neither receive signals from the host device nor perform operations and that the respective phy requires a first wake-up time duration to be transitioned to the active mode, and wherein the partial power mode indicates that the respective phy may neither receive signals from the host device nor perform operations and that the respective phy requires a second wake-up time duration to be transitioned to the active mode, wherein the second wake-up time duration is less than the first wake-up time duration.

16. The data storage device of claim 9 , wherein the controller is further configured to:

for each phy of the plurality of phys:

determine an initiator response factor for the respective phy, wherein the initiator response factor indicates a level of an initiator turnaround time for the respective phy;

determine a phy availability time factor for the respective phy, wherein the phy availability time factor indicates a level of time for the respective phy to become available to process a new operation based on the expected processing times of pending operations in a queue to be processed by the respective phy;

determine a wake-up time factor for the respective phy, wherein the wake-up time factor indicates a level of time for the respective phy to switch to an active power mode;

determine, based on the initiator response factor for the respective phy, the phy availability time factor for the respective phy, the wake-up time factor for the respective phy, and a respective weight for each of the initiator response factor, the phy availability time factor, and the wake-up time factor, the respective performance value for the respective phy; and

multiply the respective performance value with the scaled percentage of the performance value to determine the performance factor; and

select, based on the respective performance factors, the second phy.

17. The data storage device of claim 16 , wherein the scaled percentage of the performance value is equal to one hundred percent.

18. The data storage device of claim 17 , wherein the second phy comprises the phy of the plurality of phys with the largest performance factor.

19. The data storage device of claim 17 , wherein a sum of the respective weights for each of the initiator response factor, the phy availability time factor, and the wake-up time factor is equal to one hundred percent.

20. The data storage device of claim 9 , wherein a sum of the scaled percentage of the power factor and the scaled percentage of the performance value is equal to one hundred percent.

Assignments (10)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 053926 FRAME 0446 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
SECURITY INTEREST Recorded Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2020
From: GERHART, DARIN EDWARD; ORTMEIER, NICHOLAS EDWARD
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 053636/0856 →
Continuity (3)
Continuation 15967522 · Apr 30, 2018
Continuation 15061768 · Mar 4, 2016
Related Publication 20200341664A1 · Oct 29, 2020