Efficient power management modes for multiple memory devices
Disclosed are systems and methods for efficient power management for storage devices. A method includes receiving a request to transition a flash memory to a first stand-by mode, wherein the flash memory comprises a plurality of dies. The method also includes causing one or more guard dies of the plurality of dies to transition to the first stand-by mode while causing one or more other dies of the plurality of dies to transition to a second stand-by mode, wherein the second stand-by mode is configured to consume less power than the first stand-by mode. The method also includes receiving an input/output (I/O) request for the flash memory. The method also includes causing the I/O request to be performed on the one or more guard dies that are in the first stand-by mode but not in the second stand-by mode.
1. A data storage system, comprising:
a memory system comprising a plurality of memory devices; and
one or more controllers configured to cause:
instructing one or more memory devices of the plurality of memory devices to transition to a first non-active mode;
instructing one or more other memory devices of the plurality of memory devices to transition to a second non-active mode, wherein the second non-active mode is configured to consume less power than the first non-active mode;
obtaining an operational request for the memory system; and
performing the operational request on the one or more memory devices that are in the first non-active mode but not on the one or more other memory devices that are in the second non-active mode.
2. The data storage system of claim 1 , wherein the one or more controllers are further configured to cause:
in response to a request to transition the memory system to the first non-active mode:
instructing the one or more memory devices of the plurality of memory devices to transition to the first non-active mode; and
instructing the one or more other memory devices of the plurality of memory devices to transition to the second non-active mode.
3. The data storage system of claim 2 , wherein the request to transition the memory system to the first non-active mode is in response to detecting that a first idle threshold has been satisfied for the memory system.
4. The data storage system of claim 1 , wherein obtaining the operational request comprises obtaining the operational request while the one or more other memory devices of the plurality of memory devices are in the second non-active mode.
5. The data storage system of claim 1 , wherein the one or more controllers are further configured to cause:
selecting the one or more memory devices from the plurality of memory devices based on one or more of: a leakage profile of the plurality of memory devices, a prior history of selecting memory devices from the plurality of memory devices, and a previous operation of a host computer associated with the memory system.
6. The data storage system of claim 1 , wherein the one or more controllers are further configured to cause:
selecting the one or more memory devices from the plurality of memory devices based on an access history of request hits and misses recorded for the plurality of memory devices.
7. The data storage system of claim 1 , wherein the one or more controllers are further configured to cause performing the operational request in response to determining that the one or more memory devices have capacity to perform the operational request.
8. The data storage system of claim 7 , wherein the operational request is a read request, and wherein determining that the one or more memory devices have capacity comprises determining that data for the read request is stored in the one or more memory devices.
9. The data storage system of claim 7 , wherein the operational request is a write request, and wherein determining that the one or more memory devices have capacity comprises determining that a size of data for the write request does not satisfy a wake up threshold.
10. The data storage system of claim 1 , further comprising:
one or more gates coupled to the plurality of memory devices and configured to be coupled to a supply voltage,
wherein the one or more controllers are further configured to instruct the one or more other memory devices to transition to the second non-active mode by using the one or more gates to switch off the supply voltage to the one or more other memory devices that are in the second non-active mode.
11. A method, comprising:
instructing one or more memory devices of a plurality of memory devices to transition to a first non-active mode, wherein a memory system comprises the plurality of memory devices;
instructing one or more other memory devices of the plurality of memory devices to transition to a second non-active mode, wherein the second non-active mode is configured to consume less power than the first non-active mode;
obtaining an operational request for the memory system; and
performing the operational request on the one or more memory devices that are in the first non-active mode but not on the one or more other memory devices that are in the second non-active mode.
12. The method of claim 11 , wherein in response to a request to transition the memory system to the first non-active mode:
the one or more memory devices of the plurality of memory devices are transitioned to the first non-active mode; and
the one or more other memory devices of the plurality of memory devices are transitioned to the second non-active mode.
13. The method of claim 12 , wherein the request to transition the memory system to the first non-active mode is in response to detecting a first idle threshold has been satisfied for the memory system.
14. The method of claim 11 , wherein obtaining the operational request comprises obtaining the operational request while the one or more other memory devices of the plurality of memory devices are in the second non-active mode.
15. The method of claim 11 , further comprising:
selecting the one or more memory devices from the plurality of memory devices based on one or more of: a leakage profile of the plurality of memory devices, a prior history of selecting memory devices from the plurality of memory devices, and a previous operation of a host computer associated with the memory system.
16. The method of claim 11 , wherein the operational request is a read request, and wherein the operational request is performed on the one or more memory devices in response to determining that data for the read request is stored in the one or more memory devices.
17. The method of claim 11 , wherein the operational request is a write request, and wherein the operational request is performed on the one or more memory devices in response to determining that a size of data for the write request does not satisfy a wake up threshold.
18. The method of claim 11 , wherein the second non-active mode causes the memory system to use one or more circuit components to switch off a supply voltage to each of the one or more other memory devices that are in the second non-active mode.
19. An apparatus, comprising:
means for instructing one or more memory devices of a plurality of memory devices to transition to a first non-active mode, wherein a memory system comprises the plurality of memory devices;
means for instructing one or more other memory devices of the plurality of memory devices to transition to a second non-active mode, wherein the second non-active mode is configured to consume less power than the first non-active mode;
means for obtaining an operational request for the memory system; and
means for performing the operational request on the one or more memory devices that are in the first non-active mode but not on the one or more other memory devices that are in the second non-active mode.
20. The apparatus of claim 19 , wherein:
the means for instructing the one or more memory devices comprises means for instructing the one or more memory devices of the plurality of memory devices to transition to the first non-active mode, in response to a request to transition the memory system to the first non-active mode; and
the means for instructing the one or more other memory devices comprises means for instructing the one or more other memory devices of the plurality of memory devices to transition to the second non-active mode, in response to the request to transition the memory system to the first non-active mode.