Isolation structures in multi-gate semiconductor devices and methods of fabricating the same
A semiconductor structure includes a semiconductor substrate, an oxide layer disposed over the semiconductor substrate, a high-k metal gate structure (HKMG) interleaved with the stack of semiconductor layers, and an epitaxial source/drain (S/D) feature disposed adjacent to the HKMG, wherein a bottom portion of the epitaxial S/D feature is defined by the oxide layer.
1. A method, comprising:
depositing a SiGe layer over a semiconductor layer;
depositing a Si layer over the SiGe layer, thereby forming a semiconductor substrate;
doping the SiGe layer with oxygen;
annealing the oxygen-doped SiGe layer, such that the semiconductor substrate includes an oxide layer embedded therein;
forming a multi-layer stack (ML) including alternating channel layers and non-channel layers over the semiconductor substrate;
forming an epitaxial S/D feature in the ML, wherein a bottom surface of the epitaxial S/D feature directly contacts the oxide layer;
and
subsequently forming a high-k metal gate stack (HKMG) over the ML and in place of the non-channel.
2. The method of claim 1 , wherein forming the oxygen-doped SiGe layer includes performing an oxygen implantation process.
3. The method of claim 1 , wherein annealing the oxygen-doped SiGe layer includes performing a laser anneal, a spike anneal, a thermal anneal, or combinations thereof.
4. The method of claim 1 , wherein the oxide layer is a first oxide layer, the method further comprising:
forming a second oxide layer over a top surface of the semiconductor layer before forming the oxygen-doped SiGe layer; and
subsequently removing the second oxide layer after annealing the oxygen-doped SiGe layer.
5. The method of claim 1 ,
wherein the oxide layer includes silicon oxide, germanium oxide, or a combination thereof.
6. The method of claim 5 , wherein the oxide layer includes silicon oxide, germanium oxide, or a combination thereof.
7. The method of claim 5 , wherein the semiconductor layer includes elemental silicon, and wherein the silicon oxide includes SiO x , where 1≤x≤2.
8. A method, comprising:
forming a semiconductor substrate, including:
providing a first semiconductor layer, wherein the first semiconductor layer includes elemental Si;
forming a second semiconductor layer on the first semiconductor layer, wherein the second semiconductor layer includes SiGe;
forming a third semiconductor layer on the second semiconductor layer, thereby forming the semiconductor substrate, wherein the third semiconductor layer includes elemental Si;
performing an implantation process to dope the second semiconductor layer with oxygen; and
performing an annealing process to the doped second semiconductor layer to form an oxide layer;
forming a multi-layer structure (ML) including alternating Si layers and SiGe layers over the semiconductor substrate;
forming a placeholder gate stack over the ML;
forming a source/drain (S/D) recess in the ML, thereby exposing the oxide layer;
forming an S/D feature in the S/D recess; and
forming a metal gate stack in place of the placeholder gate stack and in place of the SiGe layers of the ML.
9. The method of claim 8 , wherein forming the second and the third semiconductor layers includes epitaxially growing the second and the third semiconductor layers.
10. The method of claim 8 , wherein annealing the doped second semiconductor layer includes performing a melting laser anneal process.
11. The method of claim 8 , wherein the oxide layer includes germanium oxide, silicon oxide, or a combination thereof.
12. The method of claim 8 , further comprising forming a protective layer over the third semiconductor layer before performing the implantation process and removing the protective layer after annealing the doped second semiconductor layer.
13. The method of claim 12 , wherein forming the protective layer includes oxidizing the third semiconductor layer to form silicon oxide.
14. The method of claim 8 , wherein annealing the doped second semiconductor layer includes applying oxygen and/or hydrogen while annealing.
15. A semiconductor structure, comprising:
a semiconductor substrate;
an oxide layer disposed over the semiconductor substrate, wherein the oxide layer includes germanium;
a stack of semiconductor layers disposed over the oxide layer;
a high-k metal gate structure (HKMG) interleaved with the stack of semiconductor layers; and
an epitaxial source/drain (S/D) feature disposed adjacent to the HKMG, wherein a bottom portion of the epitaxial S/D feature is defined by the oxide layer.
16. The semiconductor structure of claim 15 , wherein the semiconductor substrate includes elemental silicon but is free of oxygen, and wherein the oxide layer includes silicon and oxygen.
17. The semiconductor structure of claim 16 , wherein the first oxide layer includes SiO, SiO 2 , or a combination thereof.
18. The semiconductor structure of claim 15 , wherein the oxide layer includes germanium oxide.
19. The semiconductor structure of claim 15 , wherein the semiconductor layers are first semiconductor layers, the semiconductor structure further comprising a second semiconductor layer disposed between the oxide layer and a bottom portion of the HKMG, wherein the first semiconductor layers and the second semiconductor layer have the same composition.
20. The semiconductor structure of claim 19 , wherein the second semiconductor layer and the semiconductor substrate have the same composition.