Semiconductor device including an oxide semiconductor
View Patent ↗A transistor having high field-effect mobility is provided. In order that an oxide semiconductor layer through which carriers flow is not in contact with a gate insulating film, a buried channel structure in which the oxide semiconductor layer through which carriers flow is separated from the gate insulating film is employed. Specifically, an oxide semiconductor layer having high conductivity is provided between two oxide semiconductor layers. Further, an impurity element is added to the oxide semiconductor layer in a self-aligned manner so that the resistance of a region in contact with an electrode layer is reduced. Further, the oxide semiconductor layer in contact with the gate insulating layer has a larger thickness than the oxide semiconductor layer having high conductivity.
1. A semiconductor device comprising:
a first insulating layer;
a conductive layer over the first insulating layer;
a second insulating layer over the conductive layer;
a first oxide semiconductor layer comprising indium;
a second oxide semiconductor layer comprising indium, gallium, and zinc over the first oxide semiconductor layer;
a third oxide semiconductor layer comprising indium over the second oxide semiconductor layer;
a first electrode over the third oxide semiconductor layer;
a second electrode over the third oxide semiconductor layer;
a third insulating layer over the third oxide semiconductor layer, the first electrode, and the second electrode; and
a fourth insulating layer over the third insulating layer,
wherein a content of indium in the second oxide semiconductor layer is higher than a content of indium in the first oxide semiconductor layer, and
wherein the content of indium in the second oxide semiconductor layer is higher than a content of indium in the third oxide semiconductor layer.
2. A semiconductor device comprising:
a first insulating layer;
a conductive layer over the first insulating layer;
a second insulating layer over the conductive layer;
a first oxide semiconductor layer comprising indium;
a second oxide semiconductor layer comprising indium, gallium, and zinc over the first oxide semiconductor layer;
a third oxide semiconductor layer comprising indium over the second oxide semiconductor layer;
a first electrode over the third oxide semiconductor layer;
a second electrode over the third oxide semiconductor layer;
a third insulating layer over the third oxide semiconductor layer, the first electrode, and the second electrode; and
a fourth insulating layer over the third insulating layer,
wherein a content of indium in the second oxide semiconductor layer is higher than a content of gallium in the second oxide semiconductor layer, and
wherein the content of indium in the second oxide semiconductor layer is higher than a content of zinc in the second oxide semiconductor layer.
3. The semiconductor device according to claim 1 ,
wherein the second oxide semiconductor layer has higher conductivity than the third oxide semiconductor layer and the first oxide semiconductor layer.
4. The semiconductor device according to claim 2 ,
wherein the second oxide semiconductor layer has higher conductivity than the third oxide semiconductor layer and the first oxide semiconductor layer.
5. The semiconductor device according to claim 1 ,
wherein a side surface of the first oxide semiconductor layer is tapered, and
wherein a side surface of the second oxide semiconductor layer is tapered.
6. The semiconductor device according to claim 2 ,
wherein a side surface of the first oxide semiconductor layer is tapered, and
wherein a side surface of the second oxide semiconductor layer is tapered.
7. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer has a larger thickness than the second oxide semiconductor layer and the third oxide semiconductor layer.
8. The semiconductor device according to claim 2 , wherein the first oxide semiconductor layer has a larger thickness than the second oxide semiconductor layer and the third oxide semiconductor layer.
9. The semiconductor device according to claim 1 ,
wherein the first electrode is in contact with a side surface of the second insulating layer, and
wherein the second electrode is in contact with a side surface of the second insulating layer.
10. The semiconductor device according to claim 2 ,
wherein the first electrode is in contact with a side surface of the second insulating layer, and
wherein the second electrode is in contact with a side surface of the second insulating layer.
11. The semiconductor device according to claim 1 , further comprising a gate electrode over the fourth insulating layer.
12. The semiconductor device according to claim 2 , further comprising a gate electrode over the fourth insulating layer.
13. The semiconductor device according to claim 1 , wherein the third insulating layer comprises silicon oxide, silicon oxynitride, or aluminum oxide.
14. The semiconductor device according to claim 2 , wherein the third insulating layer comprises silicon oxide, silicon oxynitride, or aluminum oxide.
15. The semiconductor device according to claim 1 , wherein the fourth insulating layer comprises silicon nitride or silicon nitride oxide.
16. The semiconductor device according to claim 2 , wherein the fourth insulating layer comprises silicon nitride or silicon nitride oxide.
17. The semiconductor device according to claim 1 , wherein the second insulating layer comprises silicon oxide, gallium oxide, hafnium oxide, or aluminum oxide.
18. The semiconductor device according to claim 2 , wherein the second insulating layer comprises silicon oxide, gallium oxide, hafnium oxide, or aluminum oxide.
19. The semiconductor device according to claim 2 ,
wherein the content of indium in the second oxide semiconductor layer is higher than a content of indium in the first oxide semiconductor layer, and
wherein the content of indium in the second oxide semiconductor layer is higher than a content of indium in the third oxide semiconductor layer.