IP Library › Granted Patent US 11,417,743
Granted Patent B2
US 11,417,743 · App. 17/002,359 · Granted Aug 16, 2022

Semiconductor device with surface insulating film

Inventors: Yuki Nakano (Kyoto, JP); Ryota Nakamura (Kyoto, JP)
Assignee: ROHM CO., LTD.
H01L29/4236H01L29/0649H01L29/0657H01L29/0661H01L29/0688H01L29/0692H01L29/0696H01L29/1095H01L29/1602H01L29/1608H01L29/2003H01L29/36H01L29/41766H01L29/4238H01L29/42376H01L29/4916H01L29/4925H01L29/4958H01L29/518H01L29/7809H01L29/7811H01L29/7813H01L29/0619H01L29/402H01L29/407H01L29/42372
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Quick Facts
Patent No.
US 11,417,743
App. No.
17/002,359
Granted
Aug 16, 2022
Kind
B2
Abstract

A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, and a surface insulating film disposed in a manner extending across the cell portion and the outer peripheral portion, and in the cell portion, formed to be thinner than a part in the outer peripheral portion.

Claims (26)

1. A wide band gap semiconductor device comprising:

a semiconductor substrate;

a first gate insulating film on the semiconductor substrate;

a first gate electrode on the first gate insulating film;

a second gate insulating film on the semiconductor substrate; and

a second gate electrode on the second gate insulating film; and

an electrode having a source potential formed over the semiconductor substrate, the electrode being outwardly away from the first gate electrode and the second gate electrode,

wherein a portion of a surface of the semiconductor substrate between a center of the first gate electrode and a center of the second gate electrode is recessed compared to a portion under the center of the first gate electrode and the center of the second gate electrode,

wherein the semiconductor substrate comprises an outermost recessed portion that includes a recess, and

the electrode is arranged between the first and second gate electrodes and the recess of the outermost recessed portion and does not intrude into the recess of the outermost recessed portion.

2. The wide band gap semiconductor device according to claim 1 , wherein an impurity region of P-type material is formed at a surface of the outermost recessed portion.

3. The wide band gap semiconductor device according to claim 2 , wherein a source electrode is formed over the semiconductor substrate, the electrode electrically connected to the source electrode.

4. The wide band gap semiconductor device according to claim 3 , wherein a source contact region is formed in a region between the first gate electrode and the second gate electrode.

5. The wide band gap semiconductor device according to claim 4 , wherein at least one of the first gate electrode and the second gate electrode is a planer type gate electrode.

6. The wide band gap semiconductor device according to claim 5 , wherein a gate finger is formed between the source electrode and the outermost recessed portion of the semiconductor substrate in a cross section.

7. The wide band gap semiconductor device according to claim 6 , wherein a height of the gate finger is approximately the same as a height of the source electrode.

8. The wide band gap semiconductor device according to claim 7 , wherein the source electrode is made of a material including an aluminum.

9. The wide band gap semiconductor device according to claim 8 , wherein the gate finger is made of a material including an aluminum.

10. The wide band gap semiconductor device according to claim 9 , wherein a peripheral source electrode is formed between the gate finger and the outermost recessed portion of the semiconductor substrate.

11. The wide band gap semiconductor device according to claim 10 , wherein the semiconductor substrate is made of SiC, GaN, or diamond.

12. The wide band gap semiconductor device according to claim 11 , further comprising a titanium material between the source electrode and the semiconductor substrate at the source contact region.

13. The wide band gap semiconductor device according to claim 12 , wherein the gate insulating film is made of a material including silicon.

14. The wide band gap semiconductor device according to claim 13 , wherein the gate electrode is made of a material including a polysilicon.

15. The wide band gap semiconductor device according to claim 14 , wherein a surface of the source electrode is dented according to the surface of the semiconductor substrate.

16. The wide band gap semiconductor device according to claim 14 , wherein a depth of the recess of the portion of the surface of the semiconductor substrate between the center of the first gate electrode and the center of the second gate electrode is approximately the same as a depth of the recess of the outermost recessed portion.

17. The wide band gap semiconductor device according to claim 14 , wherein the recess of the portion of surface of the semiconductor substrate between the center of the first gate electrode and the center of the second gate electrode is fabricated at a same time with the recess of the outermost recessed portion.

Priority Claims (1)
JP 2013-043407 · Mar 5, 2013 · national
Continuity (6)
Continuation 16734101 · Jan 3, 2020
Continuation 16281954 · Feb 21, 2019
Continuation 15892874 · Feb 9, 2018
Continuation 15423112 · Feb 2, 2017
Continuation 14771399
Related Publication 20200388690A1 · Dec 10, 2020
Cited By (1)
US 12,745,445