Granted Patent B2

US 11,423,844 · App. 17/055,285 · Granted Aug 23, 2022

Inventors: Takayuki Ikeda (Atsugi, JP); Hidetomo Kobayashi (Isehara, JP); Hideaki Shishido (Atsugi, JP); Kiyotaka Kimura (Isehara, JP); Takashi Nakagawa (Sagamihara, JP); Kosei Nei (Yokohama, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

G09G3/3275G09G3/3233G09G3/3266G09G5/377H01L27/3253H01L29/7869G09G3/36G09G2300/0426G09G2300/0809G09G2310/0297G09G2340/12

Abstract

Claims (84)

1. A display device comprising:

a first layer; and

a second layer,

wherein the first layer and the second layer are stacked,

wherein the first layer includes a gate driver circuit and a source driver circuit,

wherein the second layer includes a display portion,

wherein pixels are arranged in a matrix in the display portion,

wherein the gate driver circuit and the source driver circuit each include a first region overlapping with the display portion,

wherein the gate driver circuit and the source driver circuit share a second region,

wherein the gate driver circuit comprises first and second transistors in the second region,

wherein the source driver circuit comprises a third transistor positioned between the first and second transistors in the second region,

wherein the source driver circuit is electrically connected to the pixel through a first data line,

wherein the source driver circuit is electrically connected to the pixel through a second data line,

wherein the source driver circuit is configured to generate a first image signal and supply the first image signal to the pixel through the first data line,

wherein the source driver circuit is configured to generate a second image signal and supply the second image signal to the pixel through the second data line, and

wherein the pixel is configured to display an image in which an image corresponding to the first image signal and an image corresponding to the second image signal are superimposed on each other.

2. The display device according to claim 1 ,

wherein the display device includes a D/A converter circuit,

wherein the D/A converter circuit includes a potential generator circuit and a pass transistor logic circuit,

wherein the potential generator circuit is provided outside the source driver circuit,

wherein the pass transistor logic circuit is provided in the source driver circuit,

wherein the potential generator circuit is configured to generate a plurality of potentials having different levels, and

wherein the pass transistor logic circuit is configured to receive image data and output any of the potentials generated by the potential generator circuit on the basis of digital value of the image data.

3. The display device according to claim 1 ,

wherein the pixel includes a display element, and

wherein the display element is a light-emitting element.

4. The display device according to claim 3 , wherein the display element is an organic EL element.

5. The display device according to claim 4 , wherein the organic EL element has a tandem structure.

6. The display device according to claim 1 ,

wherein the pixel includes a display element, a fourth transistor, a fifth transistor, a sixth transistor, and a capacitor,

wherein one of a source and a drain of the fourth transistor is electrically connected to one electrode of the capacitor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to the first data line,

wherein one of a source and a drain of the fifth transistor is electrically connected to the other electrode of the capacitor,

wherein the other of the source and the drain of the fifth transistor is electrically connected to the second data line,

wherein the other electrode of the capacitor is electrically connected to a gate of the sixth transistor, and

wherein one of a source and a drain of the sixth transistor is electrically connected to one electrode of the display element.

7. The display device according to claim 6 ,

wherein the fourth transistor and the fifth transistor each include a metal oxide in a channel formation region,

wherein the metal oxide includes an element M and Zn, and

wherein the element M is any one of Al, Ga, Y, and Sn.

8. An electronic device comprising:

the display device according to claim 1 , and

a lens.

9. A display device comprising:

a first layer; and

a second layer,

wherein the first layer and the second layer are stacked,

wherein the first layer includes a gate driver circuit and a source driver circuit,

wherein the second layer includes a display portion,

wherein pixels are arranged in a matrix in the display portion,

wherein the gate driver circuit and the source driver circuit each include a first region overlapping with the display portion,

wherein the gate driver circuit and the source driver circuit share a second region,

wherein the gate driver circuit comprises first and second transistors in the second region, and

wherein the source driver circuit comprises a third transistor positioned between the first and second transistors in the second region.

10. The display device according to claim 9 ,

wherein the first layer comprises a transistor including silicon,

wherein the second layer comprises a transistor including a metal oxide in a channel formation region,

wherein the metal oxide includes an element M and Zn, and

wherein the element M is any one of Al, Ga, Y, and Sn.

11. The display device according to claim 9 ,

wherein the first layer and the second layer each comprises a transistor including a metal oxide in a channel formation region,

wherein the metal oxide includes an element M and Zn, and

wherein the element M is any one of Al, Ga, Y, and Sn.

12. The display device according to claim 9 ,

wherein the pixel includes a display element, and

wherein the display element is a light-emitting element.

13. The display device according to claim 12 , wherein the display element is an organic EL element.

14. The display device according to claim 13 , wherein the organic EL element has a tandem structure.

15. A display device comprising:

a first layer; and

a second layer,

wherein the first layer and the second layer are stacked,

wherein the first layer includes a gate driver circuit and a source driver circuit,

wherein the second layer includes a display portion,

wherein pixels are arranged in a matrix in the display portion,

wherein the gate driver circuit and the source driver circuit each include a region overlapping with the display portion,

wherein the gate driver circuit and the source driver circuit share a second region,

wherein the gate driver circuit comprises first and second transistors in the second region,

wherein the source driver circuit comprises a third transistor positioned between the first and second transistors in the second region,

wherein the first layer comprises a transistor including silicon,

wherein the second layer comprises a transistor including a metal oxide in a channel formation region,

wherein the pixel includes a display element, and

wherein the display element is an organic EL element.

16. The display device according to claim 15 , wherein the organic EL element has a tandem structure.

Assignments (1)

Priority Claims (3)

Continuity (1)

Cited By (14)

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