IP Library Granted Patent US 11,372,771
Granted Patent B2
US 11,372,771 · App. 17/068,700 · Granted Jun 28, 2022

Invalidation data area for cache

Inventor: Pulkit Misra (Belmont, MA)
Assignee: Western Digital Technologies, Inc.
G06F12/0891G06F11/1471G06F12/0815G06F12/0866G06F12/121G06F2212/1024G06F2212/1041G06F2212/60G06F2212/62
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Quick Facts
Patent No.
US 11,372,771
App. No.
17/068,700
Granted
Jun 28, 2022
Kind
B2
Abstract

The present disclosure relates to caches, methods, and systems for using an invalidation data area. The cache can include a journal configured for tracking data blocks, and an invalidation data area configured for tracking invalidated data blocks associated with the data blocks tracked in the journal. The invalidation data area can be on a separate cache region from the journal. A method for invalidating a cache block can include determining a journal block tracking a memory address associated with a received write operation. The method can also include determining a mapped journal block based on the journal block and on an invalidation record. The method can also include determining whether write operations are outstanding. If so, the method can include aggregating the outstanding write operations and performing a single write operation based on the aggregated write operations.

Claims (64)

1. A cache, comprising:

a journal configured to cause tracking data stored in the cache; and

an invalidation data region configured to cause tracking invalidated data associated with the data tracked in the journal,

wherein:

the journal is configured to cause tracking metadata for the data; and

the invalidation data region is configured to cause storing a subset of the metadata tracked in the journal,

wherein a memory address tracked in the invalidation data region is configured to be truncated based on at least one of a storage size of an underlying storage device and an offset determined based on a memory address of a block in the underlying storage device.

2. The cache of claim 1 , wherein:

the metadata tracked in the journal comprises a memory address associated with the data;

the invalidation data region is configured to cause tracking the subset of the metadata; and

the subset of the metadata comprises a memory address associated with the invalidated data.

3. The cache of claim 2 , wherein:

the journal is configured to cause tracking the data using journal blocks;

the invalidation data region is configured to cause tracking the subset of the metadata using mapped journal blocks; and

a size of memory addresses stored in one of the mapped journal blocks is configured to be truncated based on the storage size of the underlying storage device.

4. The cache of claim 3 , wherein:

the journal blocks are configured to cause storing the metadata for the data;

the invalidation data region is configured to cause tracking the subset of the metadata using invalidation records and the mapped journal blocks;

the mapped journal blocks are configured to cause storing the subset of the metadata; and

the invalidation records are configured to cause storing the mapped journal blocks.

5. The cache of claim 3 , wherein:

the metadata tracked in the journal further comprises an index into a collection of metadata stored in each of the journal blocks; and

the subset of the metadata tracked in the invalidation data region further comprises an index into a collection of metadata stored in each of the mapped journal blocks.

6. The cache of claim 5 , wherein the index tracked in the journal is configured to be selected to have a same value as the index tracked in the invalidation data region.

7. The cache of claim 3 , wherein the cache is configured to cause determining an invalidation record number associated with an invalidation record in the invalidation data region based on a corresponding journal block number associated with the respective journal block.

8. The cache of claim 3 , wherein the cache is configured to cause determining a mapped journal block number associated with the respective mapped journal block in the invalidation data region based on a corresponding journal block number associated with the respective journal block.

9. The cache of claim 1 , wherein the invalidation data region is on a separate region of the cache from the journal.

10. A method, comprising:

tracking, using a journal, data stored in a cache;

tracking invalidated data associated with the data tracked in the journal;

tracking, using the journal, metadata for the data; and

storing, using an invalidation data region, a subset of the metadata tracked in the journal,

wherein a memory address tracked using the invalidation data region is truncated based on at least one of a storage size of an underlying storage device and an offset determined based on a memory address of a block in the underlying storage device.

11. The method of claim 10 , comprising:

tracking, using the invalidation data region, the subset of the metadata,

wherein:

the metadata tracked using the journal comprises a memory address associated with the data; and

the subset of the metadata comprises a memory address associated with the invalidated data.

12. The method of claim 11 , wherein:

the tracking the data comprises tracking the data using journal blocks;

the tracking the subset of the metadata comprises tracking the subset of the metadata using mapped journal blocks; and

a size of memory addresses stored in one of the mapped journal blocks is truncated based on the storage size of the underlying storage device.

13. The method of claim 12 , comprising:

storing, using the journal blocks, the metadata for the data; and

storing, using invalidation records, the mapped journal blocks,

wherein:

the storing the subset of the metadata comprises storing, using the mapped journal blocks, the subset of the metadata; and

the tracking the subset of the metadata using the mapped journal blocks comprises tracking the subset of the metadata using the invalidation records and the mapped journal blocks.

14. The method of claim 12 , comprising: determining a mapped journal block number associated with the respective mapped journal block in the invalidation data region based on a corresponding journal block number associated with the respective journal block.

15. An apparatus, comprising:

means for tracking, using a journal, data stored in a cache;

means for tracking invalidated data associated with the data tracked in the journal;

means for tracking, using the journal, metadata for the data; and

means for storing, using an invalidation data region, a subset of the metadata tracked in the journal,

wherein a memory address tracked using the invalidation data region is configured to be truncated based on at least one of a storage size of an underlying storage device being cached and an offset determined based on a memory address of a block in the underlying storage device.

16. The apparatus of claim 15 , comprising:

means for tracking, using the invalidation data region, the subset of the metadata,

wherein:

the metadata tracked using the journal comprises a memory address associated with the data; and

the subset of the metadata comprises a memory address associated with the invalidated data.

17. The apparatus of claim 16 , wherein:

the means for tracking the data comprises means for tracking the data using journal blocks;

the means for tracking the subset of the metadata comprises means for tracking the subset of the metadata using mapped journal blocks; and

the apparatus comprises means for truncating a size of memory addresses stored in one of the mapped journal blocks based on the storage size of the underlying storage device.

Assignments (11)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 054475 FRAME 0421 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0358 →
SECURITY INTEREST Recorded Nov 18, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 054475/0421 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2020
From: MISRA, PULKIT
To: HGST NETHERLANDS B.V.
Reel/Frame 054389/0178 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2020
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 054387/0714 →