Semiconductor device comprising first and second insulating layer each has a tapered shape
View Patent ↗A semiconductor device includes an oxide semiconductor layer including a crystalline region over an insulating surface, a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer over the gate insulating layer in a region overlapping with the crystalline region. The crystalline region includes a crystal whose c-axis is aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer.
1. A semiconductor device comprising:
a first gate electrode layer;
an oxide semiconductor layer over the first gate electrode layer;
a second gate electrode layer over the oxide semiconductor layer;
a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer;
a first insulating layer in contact with the source electrode layer; and
a second insulating layer in contact with the drain electrode layer,
wherein the first insulating layer and the second insulating layer each has a tapered shape, and
wherein each of a top surface and a side surface of the first insulating layer, a top surface and a side surface of the second insulating layer, a side surface of the source electrode layer, a side surface of the drain electrode layer and a top surface of the oxide semiconductor layer is in contact with a third insulating layer.
2. The semiconductor device according to claim 1 , wherein the third insulating layer is over the source electrode layer and the drain electrode layer.
3. The semiconductor device according to claim 1 , further comprising:
a fourth insulating layer between the first gate electrode layer and the oxide semiconductor layer,
wherein the third insulating layer is over the source electrode layer and the drain electrode layer; and
wherein a top surface of the fourth insulating layer is in contact with the third insulating layer.
4. The semiconductor device according to claim 1 ,
wherein the oxide semiconductor layer comprises a channel formation region, and
wherein the channel formation region comprises a crystal.