IP Library Granted Patent US 11,749,647
Granted Patent B2
US 11,749,647 · App. 17/137,990 · Granted Sep 5, 2023

Semiconductor device including vertical wire bonds

Inventors: Xiaofeng Di (Shanghai, CN); Junrong Yan (Shanghai, CN); CheeKeong Chin (Shanghai, CN); Weili Wang (Shanghai, CN); Xin Lu (Shanghai, CN); Qi Deng (Shanghai, CN); Chaur Yang Ng (Pulau Pinang, MY); Cong Zhang (Shanghai, CN); Chenlin Yang (Shanghai, CN); Chin-Tien Chiu (Taichung, TW)
Assignee: Western Digital Technologies, Inc.
H01L25/0657H01L24/48H01L2224/4845H01L2224/48227H01L2224/48455H01L2225/06506H01L2225/06562
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Quick Facts
Patent No.
US 11,749,647
App. No.
17/137,990
Granted
Sep 5, 2023
Kind
B2
Abstract

A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

Claims (29)

1. A semiconductor device, comprising:

a substrate, comprising:

a first surface; and

a plurality of contact fingers formed in the first surface; and

a plurality of bond wires, each bond wire having an end with a ball bump, each ball bump of the plurality of bond wires stacked vertically on a contact finger of the plurality of contact fingers;

wherein the contact finger has an area that is smaller than an area required to accommodate two or more bond wires of the plurality of bond wires mounted side-by-side on the contact finger.

2. The semiconductor device of claim 1 , wherein the contact finger is configured to receive between 2 and 6 bond wires.

3. The semiconductor device of claim 1 , further comprising a solder mask applied over the first surface, the solder mask etched to form a window over each of the plurality of contact fingers.

4. The semiconductor device of claim 1 , wherein the contact finger has a length of between 50 μm to 70 μm, and a width of between 50 μm to 70 μm.

5. The semiconductor device of claim 1 , wherein the end of each bond wire further comprises a stitch bond formed at the end of each of the plurality of bond wires.

6. The semiconductor device of claim 1 , wherein the plurality of semiconductor dies comprise between 2 and 6 semiconductor dies.

7. The semiconductor device of claim 1 , wherein the contact finger of the plurality of contact fingers has an area that is less than 28% larger than an area of a ball bump directly affixed to the contact finger.

8. The semiconductor device of claim 1 , wherein each of the plurality of semiconductor dies belongs to a different group of semiconductor dies, each group of semiconductor dies comprising at least two semiconductor dies stacked on each other within the semiconductor device.

9. The semiconductor device of claim 8 , wherein the plurality of semiconductor dies comprise a bottommost semiconductor die in each group of stacked semiconductor dies, a bond wire of the plurality of bond wires extending directly between the bottommost semiconductor die and the contact finger.

10. The semiconductor device of claim 9 , wherein the plurality of semiconductor dies each comprise an edge including die bond pads, the edges of the plurality of semiconductor dies aligned with each other in a reference plane.

11. The semiconductor device of claim 8 , wherein the groups comprise between 2 and 6 groups of semiconductor dies, and the plurality of bond wires bonded to a single contact finger comprise between 2 and 6 bond wires.

12. A semiconductor device, comprising:

a substrate, comprising:

a first surface, and

a plurality of contact fingers formed in the first surface;

at least two groups of semiconductor dies stacked on the first surface, each group comprising one or more semiconductor dies;

a plurality of bond wires extending directly between a semiconductor die from each group of semiconductor dies and the contact fingers, each bond wire having an end with a ball bump, each ball bump of the plurality of bond wires stacked vertically on a contact finger of the plurality of contact fingers;

wherein the contact finger has an area that is smaller than an area required to accommodate two or more bond wires of the plurality of bond wires mounted side-by-side on the contact finger.

13. The semiconductor device of claim 12 , wherein the at least two groups of semiconductor dies comprise between 2 and 6 groups, each group comprising between 2 and 4 semiconductor dies.

14. The semiconductor device of claim 12 , wherein a contact finger of the plurality of contact fingers has a length of between 50 μm to 70 μm, and a width of between 50 μm to 70 μm.

15. The semiconductor device of claim 12 , wherein the contact finger is configured to receive between 2 and 6 bond wires.

16. The semiconductor device of claim 12 , wherein the groups of semiconductor dies comprise between 2 and 6 semiconductor dies.

17. The semiconductor device of claim 12 , wherein the groups of semiconductor dies comprise between 2 and 4 groups of semiconductor dies.

18. The semiconductor device of claim 12 , wherein the contact finger of the plurality of contact fingers has an area that is less than 28% larger than an area of a ball bump directly affixed to the contact finger.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 055404 FRAME 0942 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0407 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2021
From: DI, XIAOFENG; YAN, JUNRONG; CHIN, CHEEKEONG; WANG, WEILI; LU, XIN; DENG, QI; NG, CHAUR YANG; ZHANG, CONG; YANG, CHENLIN; CHIU, CHIN-TIEN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 057188/0833 →
SECURITY INTEREST Recorded Feb 24, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 055404/0942 →
Priority Claims (1)
CN 202010441574.8 · May 22, 2020 · national
Continuity (1)
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