Three-dimensional memory device containing self-aligned lateral contact elements and methods for forming the same

1. A three-dimensional memory device, comprising:

an alternating stack of insulating layers and electrically conductive layers having stepped surfaces;

memory stack structures extending through the alternating stack, wherein each of the memory stack structures comprises a vertical semiconductor channel and a vertical stack of memory elements;

a retro-stepped dielectric material portion overlying the stepped surfaces; and

pillar-shaped contact-opening assemblies located within a respective pillar-shaped volume vertically extending through the retro-stepped dielectric material portion and a region of the alternating stack that underlies the retro-stepped dielectric material portion,

wherein a first one of the pillar-shaped contact-opening assemblies comprises a first conductive plug that laterally contacts a cylindrical sidewall of one of the electrically conductive layers and a conductive via structure that contacts a top surface of the first conductive plug and vertically extends at least to a horizontal plane including a top surface of the retro-stepped dielectric material portion; and

wherein the first one of the pillar-shaped contact-opening assemblies comprises a first encapsulated cavity that underlies the first conductive plug and is free of any solid phase material.

2. The three-dimensional memory device of claim 1 , wherein the first one of the pillar-shaped contact-opening assemblies comprises a second conductive plug that underlies the first encapsulated cavity and laterally contacting a cylindrical sidewall of another of the electrically conductive layers.

3. The three-dimensional memory device of claim 2 , wherein the second conductive plug is vertically spaced from an underlying material layer that underlies the alternating stack by a plurality of additional encapsulated cavities that are free of any solid phase material and a plurality of additional conductive plugs.

4. The three-dimensional memory device of claim 3 , wherein:

a bottommost one of the plurality of additional encapsulated cavities is bounded by and is defined by a set of surfaces including a cylindrical surface of the underlying material layer, a recessed surface of the underlying material layer adjoined to a bottom edge of the cylindrical surface, a cylindrical surface of a bottommost one of the insulating layers, and a bottom surface of bottommost one of at least one additional conductive plug that underlies the second conductive plug; and

all encapsulated cavities except for the bottommost one of the plurality of additional encapsulated cavities is bounded by and is defined by a set of surfaces including a cylindrical surface of a respective one of the insulating layers, a bottom surface of an overlying conductive plug, and a top surface of an underlying conductive plug.

5. The three-dimensional memory device of claim 3 , wherein:

the first encapsulated cavity and the additional encapsulating cavities are not present between the memory stack structures located in a memory array region; and

the first conductive plug comprises the topmost conductive plug in the first one of the pillar-shaped contact-opening assemblies, and the additional conductive plugs do not electrically contact the conductive via structure that contacts the top surface of the first conductive plug.

6. The three-dimensional memory device of claim 3 , wherein each electrically conductive layer that underlies the one of the electrically conductive layers comprises a respective cylindrical sidewall that is contacted by a respective one of the additional conductive plugs within the first one of the pillar-shaped contact-opening assemblies.

7. A three-dimensional memory device, comprising:

an alternating stack of insulating layers and electrically conductive layers having stepped surfaces;

memory stack structures extending through the alternating stack, wherein each of the memory stack structures comprises a vertical semiconductor channel and a vertical stack of memory elements;

a retro-stepped dielectric material portion overlying the stepped surfaces; and

pillar-shaped contact-opening assemblies located within a respective pillar-shaped volume vertically extending through the retro-stepped dielectric material portion and a region of the alternating stack that underlies the retro-stepped dielectric material portion,

wherein:

a first one of the pillar-shaped contact-opening assemblies comprises a first conductive plug that laterally contacts a cylindrical sidewall of one of the electrically conductive layers and a conductive via structure that contacts a top surface of the first conductive plug and vertically extends at least to a horizontal plane including a top surface of the retro-stepped dielectric material portion;

the first one of the pillar-shaped contact-opening assemblies comprises a vertically alternating stack of encapsulated cavities and additional conductive plugs;

each of the encapsulated cavities is located at a level of a respective one of the insulating layers; and

each of the additional conductive plugs is located at a level of a respective one of the electrically conductive layers.

8. A three-dimensional memory device, comprising:

an alternating stack of insulating layers and electrically conductive layers having stepped surfaces;

memory stack structures extending through the alternating stack, wherein each of the memory stack structures comprises a vertical semiconductor channel and a vertical stack of memory elements;

a retro-stepped dielectric material portion overlying the stepped surfaces; and

pillar-shaped contact-opening assemblies located within a respective pillar-shaped volume vertically extending through the retro-stepped dielectric material portion and a region of the alternating stack that underlies the retro-stepped dielectric material portion,

wherein:

a first one of the pillar-shaped contact-opening assemblies comprises a first conductive plug that laterally contacts a cylindrical sidewall of one of the electrically conductive layers and a conductive via structure that contacts a top surface of the first conductive plug and vertically extends at least to a horizontal plane including a top surface of the retro-stepped dielectric material portion;

each of the pillar-shaped contact-opening assemblies comprises at least one pair of a conductive plug and an encapsulated cavity arranged along a vertical direction; and

a total number of the at least one pair is different among the pillar-shaped contact-opening assemblies.

9. A three-dimensional memory device, comprising:

an alternating stack of insulating layers and electrically conductive layers having stepped surfaces;

memory stack structures extending through the alternating stack, wherein each of the memory stack structures comprises a vertical semiconductor channel and a vertical stack of memory elements;

a retro-stepped dielectric material portion overlying the stepped surfaces; and

pillar-shaped contact-opening assemblies located within a respective pillar-shaped volume vertically extending through the retro-stepped dielectric material portion and a region of the alternating stack that underlies the retro-stepped dielectric material portion,

wherein a first one of the pillar-shaped contact-opening assemblies comprises a first conductive plug that laterally contacts a cylindrical sidewall of one of the electrically conductive layers and a conductive via structure that contacts a top surface of the first conductive plug and vertically extends at least to a horizontal plane including a top surface of the retro-stepped dielectric material portion; and

wherein each of the pillar-shaped contact-opening assemblies vertically extends through a bottommost one of the electrically conductive layers, and comprises a respective conductive plug that contacts a respective cylindrical sidewall of the bottommost one of the electrically conductive layers.