IP Library Granted Patent US 12,314,842
Granted Patent B2
US 12,314,842 · App. 17/172,155 · Granted May 27, 2025

Matrix-vector multiplication using SOT-based non-volatile memory cells

Inventors: Thao A. Nguyen (San Jose, CA); Michael Ho (Redwood City, CA); Zhigang Bai (Fremont, CA); Xiaoyong Liu (San Jose, CA); Zhanjie Li (Pleasanton, CA); Yongchul Ahn (San Jose, CA); Hongquan Jiang (San Jose, CA); Quang Le (San Jose, CA)
Assignee: Western Digital Technologies, Inc.
G06N3/063G06F17/16G06N3/08G11C11/161G11C11/1675G11C11/18H10B61/00H10N50/85H10N52/00H10N52/80
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Quick Facts
Patent No.
US 12,314,842
App. No.
17/172,155
Granted
May 27, 2025
Kind
B2
Abstract

An apparatus is provided that includes an array including n rows and m columns of nodes, each row of nodes coupled to one of n first conductive lines, each column of nodes coupled to one of m second conductive lines, each node of the n rows and m columns of nodes including a spin orbit torque MRAM non-volatile memory cell configured to store a corresponding weight of an n×m array of weights each having a first weight value or a second weight value, and a control circuit configured to apply n input voltages each having a first input value or a second input value to corresponding n first conductive lines, the n input voltages corresponding to an n-element input vector. The spin orbit torque MRAM non-volatile memory cells are configured to generate m output currents at the m second conductive lines upon application of the n input voltages. The m output currents corresponding to a result of multiplying the input vector by the n×m array of weights.

Claims (75)

1. An apparatus comprising:

an array comprising n rows and m columns of nodes, each row of nodes coupled to one of n first conductive lines, each column of nodes coupled to one of m second conductive lines, each node of the n rows and m columns of nodes comprising a spin orbit torque magnetoresistive memory (MRAM) non-volatile memory cell configured to store a corresponding weight of an n×m array of weights each having a first weight value or a second weight value; and

a control circuit configured to apply n input voltages each having a first input value or a second input value to corresponding n first conductive lines, the n input voltages corresponding to an n-element input vector, wherein:

each spin orbit torque MRAM non-volatile memory cell comprises:

a first terminal coupled to one of the n first conductive lines;

a second terminal coupled to one of the m second conductive lines; and

a third terminal coupled to one of n third conductive lines;

the spin orbit torque MRAM non-volatile memory cells are configured to generate m output currents at the m second conductive lines upon application of the n input voltages; and

the m output currents correspond to a result of multiplying the input vector by the n×m array of weights.

2. The apparatus of claim 1 , wherein:

each spin orbit torque MRAM non-volatile memory cell further comprises:

a Spin Hall Effect layer; and

a magnetic tunnel junction comprising a pinned layer and a free layer that each have a perpendicular direction of magnetization; and

the magnetic tunnel junction comprises a substantially cylindrical shape.

3. The apparatus of claim 1 , wherein:

each spin orbit torque MRAM non-volatile memory cell further comprises:

a Spin Hall Effect layer; and

a magnetic tunnel junction comprising a pinned layer and a free layer that each have an in-plane direction of magnetization;

the magnetic tunnel junction comprises a substantially ellipsoidal shape; and

the pinned layer and the free layer each have an easy axis perpendicular to a current flow in the Spin Hall Effect layer.

4. The apparatus of claim 1 , wherein:

each spin orbit torque MRAM non-volatile memory cell further comprises:

a Spin Hall Effect layer; and

a magnetic tunnel junction comprising a pinned layer and a free layer that each have an in-plane direction of magnetization;

the magnetic tunnel junction comprises a substantially ellipsoidal shape; and

the pinned layer and the free layer each have an easy axis that is at an angle off-perpendicular to a current flow in the Spin Hall Effect layer.

5. The apparatus of claim 1 , wherein:

each spin orbit torque MRAM non-volatile memory cell further comprises:

a Spin Hall Effect layer; and

a magnetic tunnel junction comprising a free layer; and

each spin orbit torque MRAM non-volatile memory cell is configured to be programmed by:

applying a first electrical current pulse through the Spin Hall Effect layer to cause a direction of magnetization of the free layer to oscillate; and

applying a second electrical pulse through the magnetic tunnel junction and the Spin Hall Effect layer to switch the direction of magnetization of the free layer.

6. The apparatus of claim 1 , wherein each spin orbit torque MRAM non-volatile memory cell further comprises a Spin Hall Effect layer comprising any of a heavy metal and a topological insulator.

7. The apparatus of claim 1 , wherein each spin orbit torque MRAM non-volatile memory cell further comprises a Spin Hall Effect layer comprising bismuth antimony with (012) orientation.

8. The apparatus of claim 1 , wherein:

the n input voltages correspond to elements of an input vector; and

each spin orbit torque MRAM non-volatile memory cell is configured to conduct a memory cell current that corresponds to a result of multiplying one of the elements of the input vector by the corresponding weight stored in the spin orbit torque MRAM non-volatile memory cell.

9. The apparatus of claim 1 , wherein:

the n input voltages correspond to elements of an input vector; and

each of the m output currents corresponds to a sum of products of the input vector with corresponding weights in a column of the n×m array of weights.

10. An apparatus comprising:

a cross-point memory array comprising a plurality of spin orbit torque magnetoresistive memory (MRAM) non-volatile memory cells configured to store synaptic weights of an artificial neural network;

a plurality of word lines coupled to the spin orbit torque MRAM non-volatile memory cells; and

a plurality of bit lines coupled to the spin orbit torque MRAM non-volatile memory cells, wherein:

each spin orbit torque MRAM non-volatile memory cell comprises a Spin Hall Effect layer comprising a topological insulator; and

in response to a plurality of input voltages coupled to the plurality of word lines, the spin orbit torque MRAM non-volatile memory cells are configured to generate output currents at the plurality of bit lines representing outputs of the artificial neural network.

11. The apparatus of claim 10 , wherein each spin orbit torque MRAM non-volatile memory cell further comprises:

a first terminal coupled to one word line of the plurality of word lines; and

a second terminal coupled to one bit line of the plurality of bit lines.

12. The apparatus of claim 10 , wherein:

each spin orbit torque MRAM non-volatile memory cell further comprises a magnetic tunnel junction comprising a free layer; and

each spin orbit torque MRAM non-volatile memory cell is configured to be programmed by:

applying a first electrical current pulse through the Spin Hall Effect layer to cause a direction of magnetization of the free layer to oscillate; and

applying a second electrical pulse through the magnetic tunnel junction and the Spin Hall Effect layer to switch the direction of magnetization of the free layer.

13. The apparatus of claim 10 , wherein:

each spin orbit torque MRAM non-volatile memory cell further comprises a magnetic tunnel junction comprising a free layer; and

each spin orbit torque MRAM non-volatile memory cell is configured to be programmed by applying an electrical current pulse through the Spin Hall Effect layer to switch a direction of magnetization of the free layer.

14. The apparatus of claim 10 , wherein each bit line of the plurality of bit lines is input to an activation function of the artificial neural network.

15. The apparatus of claim 10 , wherein the topological insulator is bismuth antimony with (012) orientation.

16. A method comprising:

programming each cell of a plurality of spin orbit torque magnetoresistive memory (MRAM) non-volatile memory cells with a corresponding weight of an n×m array of weights, each cell having a first weight value or a second weight value, wherein:

each spin orbit torque MRAM non-volatile memory cell comprises:

a Spin Hall Effect layer; and

a magnetic tunnel junction comprising a free layer; and

each spin orbit torque MRAM non-volatile memory cell is configured to be programmed by:

applying a first electrical current pulse through the Spin Hall Effect layer to cause a direction of magnetization of the free layer to oscillate; and

applying a second electrical pulse through the magnetic tunnel junction and the Spin Hall Effect layer to switch the direction of magnetization of the free layer;

generating n input voltages corresponding to an n-element input vector; and

applying the n input voltages to the plurality of spin orbit torque MRAM non-volatile memory cells to generate m output currents that represent a result of multiplying the n-element input vector by the n×m array of weights.

17. The method of claim 16 , wherein the Spin Hall Effect layer comprises a topological insulator.

18. The method of claim 16 , further comprising, in response to a plurality of input voltages coupled to a plurality of word lines coupled to the spin orbit torque MRAM non-volatile memory cells:

generating, by the spin orbit torque MRAM non-volatile memory cells, output currents at a plurality of bit lines coupled to the spin orbit torque MRAM non-volatile memory cells and representing outputs of an artificial neural network, wherein the plurality of spin orbit torque MRAM non-volatile memory cells are configured to store synaptic weights of the artificial neural network.

19. The apparatus of claim 1 , wherein each spin orbit torque MRAM non-volatile memory cell further comprises a Spin Hall Effect layer comprising a topological insulator.

20. The apparatus of claim 1 , further comprising means for training the n×m array of weights to generate the m output currents representing outputs of an artificial neural network.

Assignments (10)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2021
From: NGUYEN, THAO A.; HO, MICHAEL; BAI, ZHIGANG; LIU, XIAOYONG; LI, ZHANJIE; AHN, YONGCHUL; JIANG, HONGQUAN; LE, QUANG
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055212/0670 →