IP Library Granted Patent US 12,463,097
Granted Patent B2
US 12,463,097 · App. 17/174,802 · Granted Nov 4, 2025

Semiconductor device with reduced stress die pick and place

Inventors: Xin Tian (Shanghai, CN); Junrong Yan (Shanghai, CN); Chee Keong Chin (Shanghai, CN); Weili Wang (Shanghai, CN); Yang Lei (Shanghai, CN)
Assignee: Sandisk Technologies, Inc.
H01L21/78H01L21/6838H01L24/27H01L24/83H01L2224/2763H01L2224/83855
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Quick Facts
Patent No.
US 12,463,097
App. No.
17/174,802
Granted
Nov 4, 2025
Kind
B2
Abstract

Semiconductor dies formed on a wafer may be picked from the wafer with little or no stress, thus preventing cracking and damage to the semiconductor dies. A die attach film (DAF) layer is laminated onto an inactive surface of the wafer and the DAF layer is cut in the outline of the dies. The inactive surface of the wafer may then be supported on a vacuum chuck without using a dicing tape, and dies transferred from the wafer using a pick and place robot.

Claims (23)

1 . A method of separating a semiconductor die from a semiconductor wafer, comprising the steps of:

applying a die attach film adhesive to a surface of the semiconductor wafer;

supporting the semiconductor wafer on a vacuum chuck, with a surface of the die attach film in direct contact with the vacuum chuck;

cutting the die attach film around an outline of the semiconductor die with a laser after applying the die attach film to the semiconductor die;

removing the semiconductor die from the wafer, said step of removing the semiconductor die from the wafer comprising the step of applying a first vacuum force to the surface of the die attach film while a second vacuum force is applied to one or more semiconductor dies around the semiconductor die, where the second vacuum force is greater than the first vacuum force; and

transferring the semiconductor die into the semiconductor device.

2 . The method of claim 1 , further comprising the step of partially cutting the wafer around the semiconductor die through a first major surface of the wafer, and completing the separation of the semiconductor die from the wafer by thinning the wafer from a second major surface of the semiconductor wafer, before applying the die attach film to the second major surface.

3 . The method of claim 1 , wherein the step of removing the semiconductor die from the wafer comprises the step of overcoming an adhesive force between the die attach film and the vacuum chuck.

4 . The method of claim 1 , wherein the step of removing the semiconductor die from the wafer comprises the step of gripping a first surface of the semiconductor die with the tip of a pick and place robot.

5 . The method of claim 4 , wherein the step of removing the semiconductor die from the wafer comprises the step of exerting a negative pressure against semiconductor dies around the semiconductor die being removed.

6 . The method of claim 1 , wherein the step of supporting the semiconductor wafer on the vacuum chuck comprises the step of supporting the wafer on a vacuum chuck configured to supply a positive or negative pressure to the semiconductor die independently of other semiconductor dies in the wafer.

7 . A method of assembling a semiconductor device, comprising the steps of:

applying a die attach film as a B-stage adhesive to a surface of a semiconductor wafer, the wafer comprising a number of semiconductor dies;

cutting through the die attach film around outlines of the semiconductor dies;

after cutting through the die attach film, turning the wafer over and supporting the semiconductor wafer on a vacuum chuck, with the die attach film lying against the vacuum chuck;

removing a semiconductor die from the wafer with a pick and place robot;

transferring the semiconductor die into the semiconductor device;

curing the die attach film to a C-stage adhesive to secure the semiconductor die within the semiconductor device.

8 . The method of claim 7 , further comprising the step of cutting the die attach film around an outline of the semiconductor die after applying the die attach film to the semiconductor die.

9 . The method of claim 7 , wherein the step of removing the semiconductor die from the wafer comprises the step of overcoming an adhesive force between the die attach film and the vacuum chuck.

10 . The method of claim 7 , wherein the step of removing the semiconductor die from the wafer comprises the step of exerting a negative pressure against semiconductor dies around the semiconductor die being removed.

11 . The method of claim 10 , wherein the step of removing the semiconductor die from the wafer comprises the step of blowing a fluid against the semiconductor die being removed, while the negative pressure is exerted on the semiconductor dies around the semiconductor die being removed.

12 . The method of claim 7 , wherein the step of supporting the semiconductor wafer on a vacuum chuck comprises the step of supporting the wafer on a vacuum chuck configured to supply a positive or negative pressure to the semiconductor die independently of other semiconductor dies in the wafer.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2021
From: TIAN, XIN; YAN, JUNRONG; CHIN, CHEE KEONG; WANG, WEILI; LEI, YANG
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055245/0382 →
Continuity (2)
Provisional Application 63121047 · Dec 3, 2020
Related Publication 20220181208A1 · Jun 9, 2022
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