IP Library Granted Patent US 11,650,757
Granted Patent B2
US 11,650,757 · App. 17/176,818 · Granted May 16, 2023

Storage system and method for time-based data retrieval

Inventor: Ramanathan Muthiah (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/0659G06F3/0604G06F3/0673G06F12/10H04N19/593G06F2212/657
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Quick Facts
Patent No.
US 11,650,757
App. No.
17/176,818
Granted
May 16, 2023
Kind
B2
Abstract

A storage system and method for time-based data retrieval are provided. In one embodiment, a controller of the storage system is configured to receive time information from a host; receive a write command from the host, wherein the write command comprises a logical block address; and create a time-to-logical-block-address map from the time information and the logical block address received from the host. Other embodiments are provided.

Claims (41)

1. A storage system comprising:

a memory; and

a controller configured to:

receive time information from a host;

receive a write command from the host, wherein the write command comprises a plurality of logical block addresses and video data comprising a plurality of video frames, each video frame being associated with a respective logical block address; and

create a time-to-logical-block-address map for logical block addresses of a subset of the plurality of video frames from the time information, wherein a granularity between entries in the time-to-logical-block-address map is determined by a time distance between selected frames of the plurality of video frames.

2. The storage system of claim 1 , wherein the time information is part of the video data.

3. The storage system of claim 1 , wherein the video data comprises intra-coded picture frames (I-frames).

4. The storage system of claim 3 , wherein the time information is obtained from time stamps of the I-frames.

5. The storage system of claim 4 , wherein the time stamps comprise a Program Clock Reference (PCR) of a Moving Picture Experts Group (MPEG) transport stream.

6. The storage system of claim 1 , wherein the controller is further configured to:

receive a command to read a video frame associated with a certain time;

determine a logical address of the video frame associated with the certain time using the time-to-logical-block-address map;

determine a physical address in the memory from the logical address using a logical-to-physical address map; and

read the video frame stored at the physical address in the memory.

7. The storage system of claim 1 , wherein start times and end times of the time-to-logical-block-address map change during host writes.

8. The storage system of claim 1 , wherein the time information from the host comprises absolute host time.

9. The storage system of claim 1 , wherein the controller is further configured to populate the time-to-logical-block-address map with an invalid entry for a subsequent write command.

10. The storage system of claim 1 , wherein the controller is further configured to mark an entry in the time-to-logical-block-address map as high endurance.

11. The storage system of claim 1 , wherein the memory comprises a three-dimensional memory.

12. The storage system of claim 1 , wherein start times and end times of the time-to-logical-block-address map change during host overwrites.

13. A method for enabling time-based data retrieval, the method comprising:

performing the following in a storage system comprising a memory:

receiving time information from a host;

receiving a write command from the host, wherein the write command comprises a plurality of logical block addresses and video data comprising a plurality of video frames, each video frame being associated with a respective logical block address; and

creating a time-to-logical-block-address map for logical block addresses of a subset of the plurality of video frames from the time information, wherein a granularity between entries in the time-to-logical-block-address map is determined by a time distance between selected frames of the plurality of video frames.

14. The method of claim 13 , wherein the video data comprises intra-coded picture frames (I-frames).

15. The method of claim 14 , wherein the time information is obtained from time stamps of the I-frames.

16. The method of claim 13 , wherein the time information comprises Program Clock Reference (PCR) time stamps.

17. The method of claim 13 , further comprising:

receiving a command to read a video frame associated with a certain time;

determining a logical address of the video frame associated with the certain time using the time-to-logical-block-address map;

determining a physical address in the memory from the logical address using a logical-to-physical address map; and

reading the video frame stored at the physical address in the memory.

18. The method of claim 13 , further comprising marking an entry in the time-to-logical-block-address map as high endurance.

19. The method of claim 13 , wherein start times and end times of the time-to-logical-block-address map change during host overwrites.

20. A storage system comprising:

a memory;

means for receiving time information from a host;

means for receiving a write command from the host, wherein the write command comprises a plurality of logical block addresses and video data comprising a plurality of video frames, each video frame being associated with a respective logical block address; and

means for creating a time-to-logical-block-address table for logical block addresses of a subset of the plurality of video frames from the time information, wherein a granularity between entries in the time-to-logical-block-address table is determined by a time distance between selected frames of the plurality of video frames.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2021
From: MUTHIAH, RAMANATHAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055277/0225 →
Continuity (2)
Provisional Application 63077000 · Sep 11, 2020
Related Publication 20220083268A1 · Mar 17, 2022