IP Library Granted Patent US 12,032,420
Granted Patent B2
US 12,032,420 · App. 17/177,523 · Granted Jul 9, 2024

Storage system and method for data-driven intelligent thermal throttling

Inventors: Narendhiran Chinnaanangur Ravimohan (Bangalore, IN); Ankit Gupta (Bangalore, IN); Sai Revanth Reddy Chappidi (Andhra Pradesh, IN)
Assignee: SanDisk Technologies, Inc.
G06F1/206G06F3/0604G06F3/0613G06F3/0653G06F3/0659G06F3/0679
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Quick Facts
Patent No.
US 12,032,420
App. No.
17/177,523
Granted
Jul 9, 2024
Kind
B2
Abstract

A storage system and method for data-driven intelligent thermal throttling are provided. In one embodiment, the storage system comprises a memory and a controller. The controller is configured to determine a temperature of the memory, estimate a future temperature curve based on the temperature of the memory, and determine a memory throttling delay to apply based on the estimated future temperature curve. Other embodiments are provided.

Claims (35)

1. A storage system comprising:

a memory; and

a controller configured to:

take samples of temperatures of the memory over a rolling window;

dynamically change, based on a temperature of the memory, a length of the rolling window, a frequency of temperature sampling of the memory in the rolling window, and a movement of the rolling window over time;

generate estimated future temperature curves from the samples of temperatures of the memory;

determine memory throttling delays to apply based on each estimated future temperature curve; and

reduce a number of program command sequences sent to the memory and a number of program operations performed by the memory by dynamically applying the memory throttling delays based on each estimated future temperature curve, wherein each estimated future temperature curve is associated with a relationship between performance and saturation temperature, which is used to determine the memory throttling delays.

2. The storage system of claim 1 , wherein the controller is further configured to estimate each future temperature curve based on the saturation temperature and a curvature factor.

3. The storage system of claim 1 , wherein the controller is further configured to estimate each future temperature curve by minimizing a sum of squares of errors.

4. The storage system of claim 1 , wherein the controller is further configured to estimate a new future temperature curve after applying the memory throttling delays.

5. The storage system of claim 1 , wherein the controller is further configured to apply static throttling as an exception handling operation.

6. The storage system of claim 1 , wherein the memory comprises a three-dimensional memory.

7. The storage system of claim 1 , wherein the storage system is configured to be embedded in a host.

8. The storage system of claim 1 , wherein the storage system is configured to be removably connected to a host.

9. The storage system of claim 1 , wherein the controller is further configured to dynamically apply the memory throttling delays based on each estimated future temperature curve rather than applying memory throttling delays based on fixed, pre-defined thresholds.

10. A method comprising:

performing the following in a storage system:

taking samples of temperatures of a memory over a rolling window;

dynamically changing, based on a temperature of the memory, a length of the rolling window, a frequency of temperature sampling of the memory in the rolling window, and a movement of the rolling window over time;

generating estimated future temperature curves from the samples of temperatures of the memory;

determining memory throttling delays to apply based on each estimated future temperature curve; and

reducing a number of program command sequences sent to the memory and a number of program operations performed by the memory by dynamically applying the memory throttling delays based on each estimated future temperature curve, wherein each estimated future temperature curve is associated with a relationship between performance and saturation temperature, which is used to determine the memory throttling delays.

11. The method of claim 10 , wherein each future temperature curve is estimated based on an actual temperature of the memory, the saturation temperature, and a curvature factor.

12. The method of claim 10 , further comprising using a minimizing-a-sum-of-squares-of-errors technique to estimate each future temperature curve.

13. The method of claim 10 , further comprising estimating a new future temperature curve after applying the memory throttling delays.

14. The method of claim 10 , further comprising applying static throttling in response to an exception.

15. The method of claim 10 , wherein the storage system is configured to be embedded in a host.

16. The method of claim 10 , wherein the memory throttling delays are dynamically applied based on each estimated future temperature curve rather than applying memory throttling delays based on fixed, pre-defined thresholds.

17. A storage system comprising:

a memory;

means for taking samples of temperatures of the memory over a rolling window;

means for generating estimated future temperature curves from the samples of temperatures of the memory;

means for determining memory throttling delays to apply based on each estimated future temperature curve; and

means for reducing a number of program command sequences sent to the memory and a number of program operations performed by the memory by dynamically applying the memory throttling delays based on each estimated future temperature curve, wherein each estimated future temperature curve is associated with a relationship between performance and saturation temperature, which is used to determine the memory throttling delays.

Assignments (10)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2021
From: RAVIMOHAN, NARENDHIRAN CHINNAANANGUR; GUPTA, ANKIT; CHAPPIDI, SAI REVANTH REDDY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055299/0171 →
Continuity (2)
Provisional Application 63114854 · Nov 17, 2020
Related Publication 20220155832A1 · May 19, 2022