IP Library Granted Patent US 11,545,999
Granted Patent B2
US 11,545,999 · App. 17/182,157 · Granted Jan 3, 2023

Transformation of data to non-binary data for storage in non-volatile memories

Inventors: Richard Leo Galbraith (Rochester, MN); Jonas Andrew Goode (Lake Forest, CA); Niranjay Ravindran (Rochester, MN)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
H03M13/1171C09B11/24C09B69/008C09B69/103C09K11/06F21V9/30G02F1/133617G03F7/0007G06F11/1012G06F11/1068G06F11/1072G11C29/52H01L51/0051H01L51/0061H01L51/0071H01L51/0072H03M13/1108H03M13/1111C09K2211/1048G02F1/133614
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Quick Facts
Patent No.
US 11,545,999
App. No.
17/182,157
Granted
Jan 3, 2023
Kind
B2
Abstract

A data storage system and method are provided for storing data in non-volatile memory devices. Binary data is received for storage in a non-volatile memory device. The binary data is converted into non-binary data comprising base-X values, where X is an integer greater than two. The non-binary data is encoded to generate a codeword and the codeword is written to a wordline of the non-volatile memory device.

Claims (68)

1. A machine-implemented method for non-volatile memories, comprising:

for each one of memory portions of the non-volatile memories, selecting a respective number of program levels available for programming the respective one of the memory portions;

configuring each one of the memory portions to use the selected respective number of program levels;

converting data into first non-binary data for writing to one of the memory portions of the non-volatile memories;

generating a codeword based on the first non-binary data;

writing the codeword to the one of the memory portions; and

reading the codeword from the one of the memory portions,

wherein:

the first non-binary data has a number base, which is based on the selected number of program levels available for programming the one of the memory portions;

the selected number is greater than two; and

the reading comprises reading the codeword using the selected number of program levels.

2. The machine-implemented method of claim 1 , wherein selecting the respective number of program levels comprises selecting the respective number of program levels available for programming the respective one of the memory portions, based on characteristics of the respective one of the memory portions.

3. The machine-implemented method of claim 2 , wherein the non-volatile memories comprise non-volatile memory devices, and each of the memory portions comprises a non-volatile memory device.

4. The machine-implemented method of claim 1 , comprising:

when characteristics of the one of the memory portions change, selecting a new number of program levels for the one of the memory portions;

reading a second codeword from the one of the memory portions using the selected number of program levels, wherein prior to selecting the new number of program levels, the second codeword has been stored in the one of the memory portions using the selected number of program levels;

writing a third codeword to the one of the memory portions using the new number of program levels; and

reading the third codeword from the one of the memory portions using the new number of program levels.

5. The machine-implemented method of claim 1 , wherein:

the reading comprises reading the codeword, without utilizing gray coding, to prevent a loss of cell-level information resulting from a use of gray coding.

6. The machine-implemented method of claim 1 , wherein writing the codeword comprises programming memory cells of a wordline of the one of the memory portions to respective program levels selected from N available program levels based on values of the first non-binary data, where N is an integer greater than two.

7. The machine-implemented method of claim 1 , wherein converting the data into the first non-binary data comprises converting base-two values of the data into base-N values, where N is an integer greater than two.

8. A data storage system, comprising:

non-volatile memories comprising memory portions; and

one or more controllers configured to cause:

for each one of the memory portions of the non-volatile memories, selecting a respective number of program levels available for programming the respective one of the memory portions;

configuring each one of the memory portions to use the selected respective number of program levels;

converting data into first non-binary data for writing to one of the memory portions of the non-volatile memories;

generating a codeword based on the first non-binary data;

writing the codeword to the one of the memory portions; and

reading the codeword from the one of the memory portions,

wherein:

the first non-binary data has a number base, which is based on the selected number of program levels available for programming the one of the memory portions;

the selected number is greater than two; and

the reading comprises reading the codeword using the selected number of program levels.

9. The data storage system of claim 8 , wherein selecting the respective number of program levels comprises selecting the respective number of program levels available for programming the respective one of the memory portions, based on characteristics of the respective one of the memory portions.

10. The data storage system of claim 9 , wherein the non-volatile memories comprise non-volatile memory devices, and each of the memory portions comprises a non-volatile memory device.

11. The data storage system of claim 8 , wherein the one or more controllers are configured to cause:

when characteristics of the one of the memory portions change, selecting a new number of program levels for the one of the memory portions;

reading a second codeword from the one of the memory portions using the selected number of program levels, wherein prior to selecting the new number of program levels, the second codeword has been stored in the one of the memory portions using the selected number of program levels;

writing a third codeword to the one of the memory portions using the new number of program levels; and

reading the third codeword from the one of the memory portions using the new number of program levels.

12. The data storage system of claim 8 , wherein:

the reading comprises reading the codeword, without utilizing gray coding, to prevent a loss of cell-level information resulting from a use of gray coding.

13. The data storage system of claim 8 , wherein writing the codeword comprises programming memory cells of a wordline of the one of the memory portions to respective program levels selected from N available program levels based on values of the first non-binary data, where N is an integer greater than two.

14. The data storage system of claim 8 , wherein the number base of the first non-binary data is based on a number of program levels available for programming and reading the non-volatile memories.

15. The data storage system of claim 8 , wherein converting the data into the first non-binary data comprises converting base-two values of the data into base-N values, where N is an integer greater than two.

16. An apparatus, comprising:

non-volatile memories;

for each one of memory portions of the non-volatile memories, means for selecting a respective number of program levels available for programming the respective one of the memory portions;

means for configuring each one of the memory portions to use the selected respective number of program levels;

means for converting data into first non-binary data for writing to one of the memory portions of the non-volatile memories;

means for generating a codeword based on the first non-binary data;

means for writing the codeword to the one of the memory portions; and

means for reading the codeword from the one of the memory portions,

wherein:

the first non-binary data has a number base, which is based on the selected number of program levels available for programming the one of the memory portions;

the selected number is greater than two; and

the means for reading comprises means for reading the codeword using the selected number of program levels.

17. The apparatus of claim 16 , wherein the means for selecting the respective number of program levels comprises means for selecting the respective number of program levels available for programming the respective one of the memory portions, based on characteristics of the respective one of the memory portions.

18. The apparatus of claim 16 , comprising:

means for selecting a new number of program levels for the one of the memory portions, when characteristics of the one of the memory portions change;

means for reading a second codeword from the one of the memory portions using the selected number of program levels, wherein prior to selecting the new number of program levels, the second codeword has been stored in the one of the memory portions using the selected number of program levels;

means for writing a third codeword to the one of the memory portions using the new number of program levels; and

means for reading the third codeword from the one of the memory portions using the new number of program levels.

19. The apparatus of claim 16 , wherein the means for converting the data into the first non-binary data comprises means for converting base-two values of the data into base-N values, where N is an integer greater than two.

20. The apparatus of claim 16 , wherein:

the means for reading comprises means for reading the codeword, without utilizing gray coding, to prevent a loss of cell-level information resulting from a use of gray coding.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 8, 2021
From: GALBRAITH, RICHARD LEO; GOODE, JONAS ANDREW; RAVINDRAN, NIRANJAY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055524/0635 →