IP Library Granted Patent US 11,442,666
Granted Patent B2
US 11,442,666 · App. 17/182,485 · Granted Sep 13, 2022

Storage system and dual-write programming method with reverse order for secondary block

Inventors: Yogendra Singh Sikarwar (Karnataka, IN); Ankit Naghate (Karnataka, IN); Milind Giradkar (Karnataka, IN); Rakshit Tikoo (Uttar Pradesh, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/0659G06F3/064G06F3/0619G06F3/0673G11C11/56G11C16/10G11C16/0483
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Quick Facts
Patent No.
US 11,442,666
App. No.
17/182,485
Granted
Sep 13, 2022
Kind
B2
Abstract

A storage system has a memory with primary and secondary blocks. Data is stored redundantly in the primary and secondary memory blocks but in a different programming order. For example, data is programmed in the first memory block starting at a first wordline and ending at a last wordline, while data is programmed in the second memory block starting at the last wordline and ending at the first wordline.

Claims (30)

1. A storage system comprising:

a memory comprising a multi-level cell (MLC) block of memory, a primary single-level cell (SLC) block of memory, and a secondary SLC block of memory, wherein the primary and secondary SLC blocks of memory comprise a plurality of wordlines; and

a controller configured to:

program a plurality of data segments in the plurality of wordlines in the primary SLC block of memory in a first programming order without skipping any wordlines in the prima SLC block, wherein all of the wordlines in the primary SLC block are programmed;

program a redundant version of the plurality of the data segments in the plurality of wordlines in the secondary SLC block of memory in a second programming order that is opposite the first programming order without skipping any wordlines in the secondary SLC block, wherein all of the wordlines in the secondary SLC block are programmed, and wherein a given data segment and its redundant version are stored in different wordline numbers in the primary and secondary SLC blocks; and

fold the plurality of data segments into the MLC block of memory, wherein a data segment that is readable from the primary SLC block is read from the primary SLC block, and wherein a data segment that is unreadable from the primary SLC block is read from the secondary SLC block.

2. The storage system of claim 1 , wherein the first programming order consecutively programs wordlines starting at a first wordline and ending at a last wordline, and wherein the second programming order consecutively programs wordlines starting at the last wordline and ending at the first wordline, or vice versa.

3. The storage system of claim 1 , wherein the controller is further configured to determine whether the data comprises a boot block, and wherein the primary and secondary SLC blocks are programmed with the data in response to determining that the data comprises a boot block.

4. The storage system of claim 1 , wherein the controller is further configured to determine whether the data comprises control data, and wherein the primary and secondary SLC blocks are programmed with the data in response to determining that the data comprises control data.

5. The storage system of claim 1 , wherein the memory comprises a three-dimensional memory.

6. In a storage system comprising a memory comprising a multi-level cell (MLC) block of memory, a primary single-level cell (SLC) block of memory, and a secondary SLC block of memory, wherein the primary and secondary SLC blocks of memory comprise a plurality of wordlines, a method comprising:

receiving a plurality of data segments to be stored in the memory;

performing a dual-write programming operation by:

storing the plurality of data segments in the primary SLC block of memory starting at a first wordline and ending at a last wordline, without skipping any wordlines in the primary SLC block, wherein all of the wordlines in the primary SLC block are programmed; and

storing a redundant version of the plurality of data segments in the plurality of wordlines in the secondary SLC block of memory starting at the last wordline and ending at the first wordline without skipping any wordlines in the secondary SLC block, wherein all of the wordlines in the secondary SLC block are programmed, and wherein a given data segment and its redundant version are stored in different wordline numbers in the primary and secondary SLC blocks; and

folding the plurality of data segments into the MLC block of memory, wherein a data segment that is readable from the primary SLC block is read from the primary SLC block, and wherein a data segment that is unreadable from the primary SLC block is read from the secondary SLC block.

7. The method of claim 6 , wherein the primary and secondary SLC blocks of memory comprise single-level cells.

8. The method of claim 6 , further comprising determining whether the data comprises a boot block, and wherein the dual-write programming operation is performed in response to determining that the data comprises a boot block.

9. The method of claim 6 , further comprising determining whether the data comprises control data, and wherein the dual-write programming operation is performed in response to determining that the data comprises control data.

10. The method of claim 6 , wherein the memory comprises a three-dimensional memory.

11. A storage system comprising:

a memory comprising a multi-level cell (MLC) block of memory, a primary single-level cell (SLC) block of memory, and a secondary SLC block of memory, wherein the primary and secondary SLC blocks of memory comprise a plurality of wordlines;

means for programming a plurality of data segments in the plurality of wordlines in the primary SLC block of memory in a first programming order without skipping any wordlines in the primary SLC block, wherein all of the wordlines in the primary SLC block are programmed;

means for programming a redundant version of the plurality of the data segments in the plurality of wordlines in the secondary SLC block of memory in a second programming order that is opposite the first programming order, without skipping any wordlines in the secondary SLC block, wherein all of the wordlines in the secondary SLC block are programmed, and wherein a given data segment and its redundant version are stored in different wordline numbers in the primary and secondary SLC blocks; and

means for folding the plurality of data segments into the MLC block of memory, wherein a data segment that is readable from the primary SLC block is read from the primary SLC block, and wherein a data segment that is unreadable from the primary SLC block is read from the secondary SLC block.

12. The storage system of claim 11 , wherein data is programmed in the primary SLC block of memory starting at a first wordline and ending at a last wordline, and wherein data is programmed in the secondary SLC block of memory starting at the last wordline and ending at the first wordline.

13. The storage system of claim 11 , further comprising means for determining whether the data should be redundantly programmed.

14. The storage system of claim 11 , further comprising means for determining whether the data comprises a boot block, and wherein the primary and secondary SLC blocks are programmed with the data in response to determining that the data comprises a boot block.

15. The storage system of claim 11 , further comprising means for determining whether the data comprises control data, and wherein the primary and secondary SLC blocks are programmed with the data in response to determining that the data comprises control data.

16. The storage system of claim 11 , wherein the memory comprises a three-dimensional memory.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2021
From: SIKARWAR, YOGENDRA SINGH; NAGHATE, ANKIT; GIRADKAR, MILIND; TIKOO, RAKSHIT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055371/0753 →