IP Library Granted Patent US 11,727,984
Granted Patent B2
US 11,727,984 · App. 17/184,536 · Granted Aug 15, 2023

Detection of page discrepancy during read threshold calibration

Inventors: Eran Sharon (Rishon Lezion, IL); Karin Inbar (Ramat Hasharon, IL); Alexander Bazarsky (Holon, IL); Dudy David Avraham (Even Yehuda, IL); Rohit Sehgal (San Jose, CA); Gilad Koren (San Jose, CA)
Assignee: Western Digital Technologies, Inc.
G11C11/5642G11C11/5671G11C16/26
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Quick Facts
Patent No.
US 11,727,984
App. No.
17/184,536
Granted
Aug 15, 2023
Kind
B2
Abstract

Data storage devices, such as solid state drives (SSDs), are disclosed. A read threshold calibration operation is utilized to generate a calibrated read threshold for one or more voltage states of a cell of a MLC memory. A single-level cell (SLC) read is then executed to sense the ratio of bit values at the read thresholds of the voltage states, where SLC read refers to reading at a single read threshold, rather than to the cell type. The sensing results in a binary page with certain statistics of 1's and 0's. The ratio of 1's (or 0's) in the binary page is used to determine a deviation from the expected ratio, where the deviation is used to adjust the calibrated read threshold to match the voltage states of the MLC memory.

Claims (31)

1. A data storage device, comprising:

a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of cells, and wherein each of the plurality of cells comprises one or more pages; and

a controller coupled to the non-volatile storage unit, wherein the controller is configured to:

generate a calibrated read threshold for one or more voltage states of a cell of multi-level cell (MLC) for the one or more pages;

sense a statistic of the one or more pages at an expected read threshold, wherein the sensing is a single-level cell (SLC) read at the expected read threshold;

compare the sensed statistic of the one or more pages to an expected statistic of the one or more pages; and

adjust, based on a deviation from the expected statistic, the calibrated read threshold.

2. The data storage device of claim 1 , wherein each of the one or more pages is an upper page, a middle page, or a lower page.

3. The data storage device of claim 1 , wherein sensing the statistic of the one or more pages comprises sensing a first number of first bit values or a second number of second bit values.

4. The data storage device of claim 3 , wherein the first bit value corresponds to a logical “1” value and the second bit value corresponds to a logical “0” value.

5. The data storage device of claim 4 , wherein the controller is further configured to perform a read threshold calibration operation to provide the expected statistic of the one or more pages, wherein the expected statistic is a ratio of the first number of the first bits to a total number of bits, and wherein the total number of bits comprises the first number of first bits and the second number of second bits.

6. The data storage device of claim 1 , wherein the expected statistic is a result of a read threshold calibration operation, and wherein the read threshold calibration operation comprises reading one or more expected read thresholds of the one or more voltage states.

7. The data storage device of claim 1 , wherein the adjusting is a read voltage distribution shift in a positive voltage direction or a negative voltage direction to match the sensed statistic.

8. A data storage device, comprising:

a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of cells, and wherein each of the plurality of cells comprises one or more pages; and

a controller coupled to the non-volatile storage unit, wherein the controller is configured to:

initiate a read threshold calibration operation for the one or more pages of a cell of multi-level cell (MLC);

analyze results of the read threshold calibration operation to determine one or more calibrated read thresholds;

sense a ratio of bit values of at least one or more single read thresholds for a single-level cell (SLC);

calculate a statistic, based on the sensing, of the one or more pages, wherein a sensed statistic is a fraction of a first number of first bit values or a fraction of a second number of second bit values;

determine if the sensed statistic is within an acceptable range from an expected statistic;

generate an alert if the sensed statistic is outside the acceptable range from the expected statistic; and

adjust, based on a deviation from the expected statistic, the one or more calibrated read thresholds.

9. The data storage device of claim 8 , wherein the statistic is a ratio of a first number of first bit values to a total number of bits, and wherein the total number of bits comprises the first number of first bit values and a second number of second bit values.

10. The data storage device of claim 9 , wherein the first number of bit values is a number of logical “1's” and the second number of bit values is a number of logical “0's”.

11. The data storage device of claim 8 , wherein the controller, when the alert is generated, is further configured to perform at least one of the following:

repeat the read threshold calibration operation utilizing modified sensing parameters, the modified sensing parameters comprising at least one of relaxing a timing of the read threshold calibration operation and performing a single plane read;

adjust one or more scanning combs of the read threshold operation; and

relocate recoverable data from the one or more pages.

12. The data storage device of claim 8 , wherein the acceptable range is a number of standard deviations, and wherein the number of standard deviations is between about 5 and about 10.

13. The data storage device of claim 8 , wherein the deviation from the expected statistic is a read voltage distribution shift in a positive voltage direction or in a negative voltage direction to match the sensed statistic.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2021
From: SHARON, ERAN; INBAR, KARIN; BAZARSKY, ALEXANDER; AVRAHAM, DUDY DAVID; SEHGAL, ROHIT; KOREN, GILAD
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055554/0021 →