IP Library Granted Patent US 11,543,992
Granted Patent B2
US 11,543,992 · App. 17/185,325 · Granted Jan 3, 2023

Decreasing physical secure erase times in solid state drives

Inventors: Vinayak Bhat (Bangalore, IN); Amiya Banerjee (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/0652G06F3/0619G06F3/0623G06F3/0659G06F3/0679
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Quick Facts
Patent No.
US 11,543,992
App. No.
17/185,325
Granted
Jan 3, 2023
Kind
B2
Abstract

Storage devices may be configured to desirably reduce the time required to perform a physical secure erase operation. The storage device includes a controller that is configured to direct the storage device to receive a physical secure erase command. The storage device can then identify the one or more blocks within the memory array for secure erasure based on the received physical secure erase command. For each block identified for erasure, the storage device further evaluates the block to determine the level type of cells within the block. In response to the cell level type being single-level, a single-cell erase command is issued to perform a single-level cell erase on the block. Conversely, in response to the cell level type being a higher-dimensional cell, a modified single-cell erase command to perform a modified single-level cell erase on the block is issued.

Claims (45)

1. A storage device, comprising:

a controller configured to direct the storage device to:

receive a physical secure erase command; and

identify one or more blocks for erasure based on the received physical secure erase command;

wherein, for each block identified for erasure, the storage device;

evaluates the block to determine a level type of cells within the block;

in response to a cell level type being single-level, issues a single-cell erase command to perform a single-level cell erase on the block; and

in response to the cell level type being a higher-dimensional cell, issues a single-cell erase command to perform a single-level cell erase on the block,

wherein the single-cell erase command is modified prior to erasure, and wherein the storage device discards the block from erasure in response to a determination that a block is already in a securely erased state.

2. The storage device of claim 1 , wherein the modified single-level cell erase command is modified via changing one or more parameters.

3. The storage device of claim 2 , wherein the one or more parameters include adjusting the application time of the single-level cell erase.

4. The storage device of claim 3 , wherein the application time of the modified single-level cell erase is longer than the non-modified single-level erase.

5. The storage device of claim 4 , wherein the application time of the modified single-level cell erase is longer than the non-modified single-level erase and shorter than a quad-level cell erase.

6. The storage device of claim 2 , wherein the one or more parameters include adjusting the pulse strength of the single-level cell erase.

7. The storage device of claim 3 , wherein the pulse strength of the modified single-level cell erase is stronger than the non-modified single-level erase.

8. The storage device of claim 1 , wherein the controller further directs the storage device to flash write each block upon completion of the physical secure erase.

9. The storage device of claim 1 , wherein the physical secure erase is completed within a predetermined amount of time.

10. The storage device of claim 9 , wherein the predetermined amount of time to complete a physical secure erase of all blocks within the storage device is less than thirty seconds.

11. The storage device of claim 1 , wherein the physical secure erase command is received from a host computing device.

12. The storage device of claim 11 , wherein the received physical secure erase is completed within a time determined by the host computing system.

13. The storage device of claim 1 , wherein the evaluation of the blocks to determine the level type of cells within the block is accomplished via a data trace.

14. The storage device of claim 1 , wherein the level-type of the higher-dimensional cells are triple-level cells.

15. The storage device of claim 1 , wherein the level-type of the higher-dimensional cells are quad-level cells.

16. A method of performing a physical secure erase on a storage device, the method comprising:

receiving a physical secure erase command; and

identifying one or more blocks for erasure based on the received physical secure erase command;

wherein, for each block identified for erasure, the storage device:

evaluates the block to determine a level type of cells within the block;

in response to the cell level type being single-level, issues a single-cell erase command to perform a single-level cell erase on the block; and

in response to the cell level type being a higher-dimensional cell, issues a single-cell erase command to perform a single-level cell erase on the block,

wherein the single-cell erase command is modified prior to erasure, and wherein the storage device discards the block from erasure in response to a determination that a block is already in a securely erased state.

17. The method of claim 16 , wherein the storage device comprises one or more sub blocks.

18. The method of claim 17 , wherein the evaluation and erase of blocks is done first on user blocks and then growth bad blocks.

19. The method of claim 18 , wherein error messages generated from erasing growth bad blocks are ignored.

20. A storage device, comprising:

a controller configured to direct the storage device to:

receive a physical secure erase command; and

identify one or more blocks for erasure based on the received physical secure erase command;

wherein, for each block identified for erasure, the storage device;

evaluates the block to determine:

a level type with respect to cells within the block; and

whether the block is already in a securely erased state;

in response to the cell level type being single-level and not in a securely erased state, issues a single-cell erase command to perform a single-level cell erase on the block; and

in response to the cell level type being a higher-dimensional cell and not in a securely erased state, issues a single-cell erase command to perform a single-level cell erase on the block,

wherein the single-cell erase command is modified prior to erasure, and wherein the storage device discards the block from erasure in response to a determination that a block is already in a securely erased state.

Assignments (10)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2021
From: BHAT, VINAYAK; BANERJEE, AMIYA
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055413/0955 →
Continuity (2)
Provisional Application 63123102 · Dec 9, 2020
Related Publication 20220179578A1 · Jun 9, 2022
Cited By (2)
US 12,254,209 US 12,386,544