Dual data ports with shared detection line
Devices and methods are disclosed for detecting which of a multiple ports of a storage device is connected to a host system using a shared detection line. In certain embodiments, a storage device includes non-volatile memory, a first data port, a second data port having a faster data transfer speed, a shared detection line, and control circuitry. The control circuitry can be configured to detect voltage on the shared detection line in response to a connection of at least one of the first data port and the second data port to the host system, determine which of the first data port or the second data port is connected to the host system, and establish a data connection with the host system at the first data transfer speed or the second data transfer speed based on the port connected to the host system.
1. A storage device comprising:
non-volatile memory configured to store data;
a first data port configured to have a first data transfer speed;
a second data port configured to have a second data transfer speed faster than the first data transfer speed;
a shared detection line connected to the first data port and the second data port;
control circuitry connected to the shared detection line, the control circuitry configured to:
detect voltage on the shared detection line in response to a connection of at least one of the first data port and the second data port to a host system;
determine which of the first data port or the second data port is connected to the host system; and
establish a data connection with the host system at the first data transfer speed or the second data transfer speed based on the determined port connected to the host system; and
a fuse between the shared detection line and the control circuitry, the fuse configured to disconnect the shared detection line from the control circuitry in response to a voltage overage being received from connecting both the first data port and the second data port to power sources.
2. The storage device of claim 1 , wherein the host system comprises the power sources.
3. The storage device of claim 1 , further comprising:
a first data channel connected to the first data port; and
a second data channel connected to the second data port;
wherein the control circuitry is further configured to determine which of the first data port or the second data port is connected to the host system by:
toggling between the first data channel and the second data channel; and
awaiting a command from the host system.
4. The storage device of claim 3 , wherein the control circuitry is further configured to determine which of the first data port or the second data port is connected to the host system by:
in response to receiving the command on the first data channel, establishing a first data connection to the host system at the first data transfer speed through the first data port; and
in response to receiving the command on the second data channel, establishing a second data connection to the host system at the second data transfer speed through the second data port.
5. The storage device of claim 3 , wherein the control circuitry is further configured to determine which of the first data port or the second data port is connected to the host system by:
awaiting the command from the host system on the first data channel;
in response to receiving the command, establishing a first data connection to the host system at the first data transfer speed through the first data port; and
in response to not receiving the command prior to a timer expiring, establishing a second data connection to the host system at the second data transfer speed through the second data port.
6. The storage device of claim 3 , wherein the control circuitry is further configured to determine which of the first data port or the second data port is connected to the host system by:
awaiting the command from the host system on the first data channel;
in response to receiving the command, establishing a first data connection to the host system at the first data transfer speed through the first data port; and
in response to not receiving the command prior to a first timer expiring:
awaiting the command from the host system on the second data channel;
in response to receiving the command, establishing a second data connection to the host system at the second data transfer speed through the second data port; and
in response to not receiving the command prior to a second timer expiring, awaiting the command from the host system on the first data channel.
7. The storage device of claim 1 , wherein:
the first data port is a first type of universal serial bus (USB) port; and
the second data port is a second type of USB port.
8. The storage device of claim 1 , wherein:
the first data port is a universal serial bus (USB) Type-A port; and
the second data port is a USB Type-C port.
9. The storage device of claim 1 , wherein the shared detection line is configured to provide power to the control circuitry and the non-volatile memory from the host system.
10. A method for detecting which port of multiple ports of a storage device is connected to a host system using a shared detection line, the shared detection line connected to a first data port and a second data port of the storage device, the method comprising:
receiving a connection to a host system on the first data port or the second data port, the first data port having a first data transfer speed and the second data port having a second data transfer speed faster than the first data transfer speed;
detecting voltage on the shared detection line in response to the received connection to the host system;
determining which of the first data port or the second data port is connected to the host system;
establishing a data connection with the host system at the first data transfer speed or the second data transfer speed based on the determined port connected to the host system; and
disconnecting, by a fuse, the shared detection line from control circuitry of the storage device in response to a voltage overage being received from connecting both the first data port and the second data port to power sources.
11. The method of claim 10 , wherein determining which of the first data port or the second data port is connected to the host system comprises:
toggling between a first data channel connected to the first data port and a second data channel connected to the second data port; and
awaiting a command from the host system.
12. The method of claim 11 , wherein determining which of the first data port or the second data port is connected to the host system further comprises:
in response to receiving the command on the first data channel, establishing a first data connection to the host system at the first data transfer speed through the first data port; and
in response to receiving the command on the second data channel, establishing a second data connection to the host system at the second data transfer speed through the second data port.
13. The method of claim 11 , wherein determining which of the first data port or the second data port is connected to the host system further comprises:
awaiting the command from the host system on the first data channel;
in response to receiving the command, establishing a first data connection to the host system at the first data transfer speed through the first data port; and
in response to not receiving the command prior to a timer expiring, establishing a second data connection to the host system at the second data transfer speed through the second data port.
14. The method of claim 11 , wherein determining which of the first data port or the second data port is connected to the host system further comprises:
awaiting the command from the host system on the first data channel;
in response to receiving the command, establishing a first data connection to the host system at the first data transfer speed through the first data port; and
in response to not receiving the command prior to a first timer expiring:
awaiting the command from the host system on the second data channel;
in response to receiving the command, establishing a second data connection to the host system at the second data transfer speed through the second data port; and
in response to not receiving the command prior to a second timer expiring, awaiting the command from the host system on the first data channel.
15. The method of claim 10 , wherein:
the first data port is a first type of universal serial bus (USB) port; and
the second data port is a second type of USB port.
16. The method of claim 10 , wherein:
the first data port is a universal serial bus (USB) Type-A port; and
the second data port is a USB Type-C port.
17. A storage device comprising:
means for persistently storing data;
a first data port having a first data transfer speed;
a second data port having a second data transfer speed faster than the first data transfer speed;
a shared detection line connected to the first data port and the second data port;
means for detecting voltage on the shared detection line in response to a connection of at least one of the first data port and the second data port to a host system;
means for determining which of the first data port or the second data port is connected to the host system;
means for establishing a data connection with the host system at the first data transfer speed or the second data transfer speed based on based on the determined port connected to the host system; and
a fuse between the shared detection line and control circuitry of the storage device, the fuse configured to disconnect the shared detection line from the control circuitry in response to a voltage overage being received from connecting both the first data port and the second data port to power sources.
18. The storage device of claim 17 , wherein the host system comprises the power sources.
19. The storage device of claim 17 , wherein:
the first data port is a first type of universal serial bus (USB) port; and
the second data port is a second type of USB port.
20. The storage device of claim 17 , wherein:
the first data port is a universal serial bus (USB) Type-A port; and
the second data port is a USB Type-C port.