IP Library Granted Patent US 11,422,734
Granted Patent B2
US 11,422,734 · App. 17/187,275 · Granted Aug 23, 2022

Managing overwrite data within solid state drives

Inventor: Dinesh Kumar Agarwal (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/0652G06F3/0665G06F3/0683G06F3/0604
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Quick Facts
Patent No.
US 11,422,734
App. No.
17/187,275
Granted
Aug 23, 2022
Kind
B2
Abstract

Storage devices can be configured to desirably reduce the number of times a zone reset or erasure occur via the use of one or more paired overwrite memory blocks. These storage devices can include a plurality of memory devices with some of these memory devices designated as overwrite memory devices. A controller within the storage device can be configured to direct the storage device to generate one or more subsets within the memory devices such as zones, pair each of subsets with at least one or more overwrite memory devices, store data sequentially within the subset of memory devices, and store any received overwrite data in the overwrite memory devices in chronological order. Data stored within the subsets of memory devices are not erased and instead of being overwritten directly, are instead pointed via a control table to a location in the overwrite memory devices storing the corresponding overwrite data.

Claims (46)

1. A storage device, comprising:

a plurality of memory devices, wherein a one or more of the memory devices are designated as overwrite memory devices; and

a controller configured to direct the storage device to:

generate one or more subsets of the plurality of memory devices;

pair each of the one or more subsets of memory devices with at least one or more overwrite memory devices;

store data sequentially within the subset of memory devices;

store overwrite data in the overwrite memory devices in chronological order, wherein one or more overprovisioned memory devices are utilized to provide the overwrite memory devices;

wherein the storage device is further configured to receive a signal from a communicatively connected host computing device; and

wherein the signal is formatted to indicate whether pairing between the subset of memory devices and the at least one or more overwrite memory devices is required.

2. The storage device of claim 1 , wherein the overwrite data is associated with one or more corresponding virtually erased memory devices within the subset of memory devices.

3. The storage device of claim 2 , wherein the association between the overwrite data and corresponding virtually erased memory devices is facilitated by a control table.

4. The storage device of claim 3 , wherein the control table is managed by a firmware operating within the storage device.

5. The storage device of claim 3 , wherein the control table is utilized to redirect requests for data within the virtually erased memory devices to the associated overwrite data within the overwrite memory devices.

6. The storage device of claim 2 , wherein the erased memory devices do not share adjacent logical block addresses.

7. The storage device of claim 6 , wherein the chronological order of the overwrite data associated with the erased memory devices is not in a sequential logical block address order.

8. The storage device of claim 1 , wherein the subset of memory devices and overwrite memory devices are not erased until a reset command is issued.

9. The storage device of claim 8 , wherein the reset command erases all memory devices within the subset of memory devices and the paired overwrite memory devices.

10. The storage device of claim 1 , wherein the storage device is further configured to analyze the read and write commands received and determine whether pairing between the subset of memory devices and the at least one or more overwrite memory devices is required.

11. The storage device of claim 1 , wherein the subset of memory devices is a superblock of memory devices.

12. The storage device of claim 1 , wherein the overwrite memory devices is a block of memory devices.

13. The storage devices of claim 1 , wherein there is one block of overwrite memory devices for every subset of ninety-six memory devices.

14. A method of managing overwrite data within a storage device comprising:

generating one or more subsets of memory devices within the storage device;

pairing each of the one or more subsets of memory devices with at least one or more overwrite memory devices;

storing data sequentially within the subset of memory devices; and

storing overwrite data in the overwrite memory devices in chronological order, wherein one or more overprovisioned memory devices are utilized to provide the overwrite memory devices;

wherein the storage device is further configured to receive a signal from a communicatively connected host computing device; and

wherein the signal is formatted to indicate whether pairing between the subset of memory devices and the at least one or more overwrite memory devices is required.

15. The method of claim 14 , the method further comprising:

receiving subsequent overwrite data wherein the at least part of the subsequent overwrite data directs overwriting of a portion of the previous overwrite data within the overwrite memory devices;

chronologically adding the subsequent overwrite data to the overwrite memory devices; and

virtually erasing the overwritten portion of the previous overwrite data within the overwrite memory devices.

16. A storage device, comprising:

a firmware configured to receive commands from a communicatively coupled host computing device;

a plurality of memory devices, wherein a one or more of the memory devices are designated as overwrite memory devices; and

a controller configured to receive commands from a communicatively coupled host computing device and direct the storage device to:

parse a received command to generate one or more zones within the memory devices;

generate one or more zones within the plurality of memory devices;

pair each of the one or more zones with at least one or more overwrite blocks of memory devices;

store data sequentially within the one or more zones;

parse a received command to erase one or more memory devices within the zone;

virtually erase the one or more memory devices within the zone;

receive overwrite data directed to the one or more virtually erased memory devices; and

store the overwrite data in the overwrite blocks in chronologically received order, wherein one or more overprovisioned memory devices are utilized to provide the overwrite memory devices;

wherein the storage device is further configured to receive a signal from a communicatively connected host computing device; and

wherein the signal is formatted to indicate whether pairing between the subset of memory devices and the at least one or more overwrite memory devices is required.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2021
From: AGARWAL, DINESH KUMAR
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055432/0420 →
Continuity (2)
Provisional Application 63134430 · Jan 6, 2021
Related Publication 20220214824A1 · Jul 7, 2022