IP Library Granted Patent US 11,601,141
Granted Patent B2
US 11,601,141 · App. 17/187,695 · Granted Mar 7, 2023

Error correction based on physical characteristics for memory

Inventors: Gadi Vishne (Petah Tikva, IL); David Rozman (Kiryat-Malakhi, IL); Alex Bazarsky (Holon, IL)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
H03M13/353G06F11/1068G11C16/0483G11C16/10G11C16/26
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Quick Facts
Patent No.
US 11,601,141
App. No.
17/187,695
Granted
Mar 7, 2023
Kind
B2
Abstract

Apparatuses, systems, and methods are presented for error correction based on physical characteristics for memory. A controller may be configured to read a set of encoded bits from a set of cells of a memory array. The controller may be configured to divide the encoded bits into reliability groups based on one or more persistent physical characteristics associated with cells of the set of cells. The controller may be configured to provide reliability estimates based on the reliability groups to a soft decision decoder for decoding the encoded bits.

Claims (29)

1. An apparatus, comprising:

an array of memory cells; and

a controller configured to:

read a set of encoded bits from a set of cells of the array;

divide the encoded bits into reliability groups according to one or more persistent physical characteristics associated with cells of the set of cells, the one or more persistent physical characteristics comprising physical properties associated with the set of cells that are unchanged by writing data to the set of cells; and

provide reliability estimates according to the reliability groups to a soft decision decoder for decoding the encoded bits.

2. The apparatus of claim 1 , wherein the set of encoded bits is a received codeword for an error correcting code, such that the controller is configured to divide the bits of the received codeword into reliability groups.

3. The apparatus of claim 1 , wherein the one or more persistent physical characteristics comprise an interface bit index, such that the controller is configured to divide bits into reliability groups based on interface bit indices.

4. The apparatus of claim 1 , wherein the one or more persistent physical characteristics comprise a drain select gate (SGD) downshift, such that the controller is configured to divide bits into reliability groups based on SGD downshifts.

5. The apparatus of claim 1 , wherein the controller is configured to divide the encoded bits into reliability groups based on the one or more persistent physical characteristics and based on soft bits from a soft read operation.

6. The apparatus of claim 1 , wherein the controller is configured to provide the reliability estimates by referencing recorded reliability estimates for the reliability groups, and to update the recorded reliability estimates based on feedback from the soft decision decoder.

7. The apparatus of claim 6 , wherein the controller is configured to initiate a recalibration in response to one or more of the recorded reliability estimates failing to satisfy a threshold.

8. The apparatus of claim 7 , wherein the one or more persistent physical characteristics comprise an interface bit index, and the recalibration comprises updating a delay for sampling data from data lines.

9. The apparatus of claim 7 , wherein the one or more persistent physical characteristics comprise a drain select gate (SGD) downshift, and the recalibration comprises reprogramming SGD transistors.

10. A method, comprising:

reading, from a set of memory cells, a received codeword for an error correcting code;

assigning bits of the received codeword into reliability groups according to one or more persistent physical characteristics associated with cells of the set of cells, the one or more persistent physical characteristics comprising physical properties associated with the set of memory cells that are unchanged by writing data to the set of memory cells; and

providing reliability estimates according to the reliability groups to a soft decision decoder for decoding the received codeword.

11. The method of claim 10 , wherein the one or more persistent physical characteristics comprise an interface bit index, such that assigning bits of the received codeword into reliability groups is based on interface bit indices.

12. The method of claim 10 , wherein the one or more persistent physical characteristics comprise a drain select gate (SGD) downshift, such that assigning bits of the received codeword into reliability groups is based on SGD downshifts.

13. The method of claim 10 , wherein assigning bits of the received codeword into reliability groups is based on the one or more persistent physical characteristics and based on soft bits from a soft read operation.

14. The method of claim 10 , wherein providing the reliability estimates comprises referencing recorded reliability estimates for the reliability groups, the method further comprising updating the recorded reliability estimates based on feedback from the soft decision decoder.

15. The method of claim 14 , further comprising initiating a recalibration in response to one or more of the recorded reliability estimates failing to satisfy a threshold.

16. An apparatus comprising:

means for reading a set of encoded bits from a set of memory cells;

means for determining a correspondence between the encoded bits and at least two reliability groups according to one or more persistent physical characteristics associated with cells of the set of cells, the one or more persistent physical characteristics comprising physical properties associated with the set of memory cells that are unchanged by writing data to the set of memory cells; and

means for providing reliability estimates according to the reliability groups to a soft decision decoder for decoding the encoded bits.

17. The apparatus of claim 16 , wherein the means for providing the reliability estimates references recorded reliability estimates for the reliability groups, the apparatus further comprising means for updating the recorded reliability estimates based on feedback from the soft decision decoder.

18. The apparatus of claim 17 , further comprising means for initiating a recalibration in response to one or more of the recorded reliability estimates failing to satisfy a threshold.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2021
From: VISHNE, GADI; ROZMAN, DAVID; BAZARSKY, ALEX
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055982/0143 →
Continuity (2)
Provisional Application 63131312 · Dec 28, 2020
Related Publication 20220278697A1 · Sep 1, 2022