IP Library › Granted Patent US 11,594,471
Granted Patent B2
US 11,594,471 · App. 17/191,287 · Granted Feb 28, 2023

Semiconductor chip including through electrode, and semiconductor package including the same

Inventors: Ho Young Son (Icheon-si Gyeonggi-do, KR); Sung Kyu Kim (Icheon-si Gyeonggi-do, KR); Mi Seon Lee (Icheon-si Gyeonggi-do, KR)
Assignee: SK hynix Inc.
H01L23/481H01L24/16H01L25/0657H01L2224/16146H01L2225/06513
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Quick Facts
Patent No.
US 11,594,471
App. No.
17/191,287
Granted
Feb 28, 2023
Kind
B2
Abstract

A semiconductor chip may include: a body portion with a front surface and a rear surface; a pair of through electrodes penetrating the body portion; an insulating layer disposed over the rear surface of the body portion and the pair of through electrodes; and a rear connection electrode disposed over the insulating layer and connected simultaneously with the pair of through electrodes, wherein a distance between the pair of through electrodes is greater than twice a thickness of the insulating layer.

Claims (55)

1. A semiconductor chip comprising:

a body portion with a front surface and a rear surface;

an insulating layer disposed over the rear surface of the body portion;

a pair of through electrodes penetrating the body portion and the insulating layer;

a rear connection electrode disposed over the insulating layer and connected simultaneously with the pair of through electrodes; and

a front connection electrode disposed over the front surface of the body portion,

wherein the front connection electrode is connected simultaneously with the pair of through electrodes,

wherein a distance between the pair of through electrodes is greater than twice a thickness of the insulating layer.

2. The semiconductor chip according to claim 1 , wherein the pair of through electrodes receives power.

3. The semiconductor chip according to claim 2 , further comprising:

a signal through electrode penetrating the body portion and the insulating layer, wherein the signal through electrode transmits a signal; and

a signal rear connection electrode disposed over the insulating layer and connected to the signal through electrode.

4. The semiconductor chip according to claim 1 , further comprising:

a dummy rear connection electrode disposed over the insulating layer, wherein the dummy rear connection electrode is in an electrically floating state.

5. The semiconductor chip according to claim 1 , wherein the thickness of the insulating layer includes a first thickness that is outside of the pair of through electrodes and a second thickness between the pair of through electrodes,

wherein the second thickness is less than the first thickness, and

wherein the distance between the pair of through electrodes is greater than twice the first thickness.

6. The semiconductor chip according to claim 1 , wherein the insulating layer includes a first insulating layer and a second insulating layer, and

wherein the first insulating layer is formed between the second insulating layer and each of the pair of through electrodes, and between the second insulating layer and the rear surface of the body portion.

7. The semiconductor chip according to claim 1 , further comprising:

a metal-containing thin film layer interposed between the rear connection electrode and the pair of through electrodes, wherein the metal-containing thin film layer is connected simultaneously with the pair of through electrode.

8. The semiconductor chip according to claim 7 , wherein the metal-containing thin film layer includes an undercut that is formed under a sidewall of the rear connection electrode due to the metal-containing thin film layer being recessed.

9. The semiconductor chip according to claim 8 , wherein a width of the rear connection electrode is equal to or greater than a sum of widths of the pair of through electrodes, the distance between the pair of through electrodes, and a width of the undercut.

10. The semiconductor chip according to claim 7 , wherein one sidewall of the metal-containing thin film layer is aligned with one sidewall of one of the pair of through electrodes.

11. The semiconductor chip according to claim 1 , wherein each of the pair of through electrodes includes a conductive pillar and a spacer insulating layer that surround a sidewall of the conductive pillar.

12. The semiconductor chip according to claim 11 , further comprising:

a metal-containing thin film layer interposed between the rear connection electrode and the pair of through electrodes, wherein the metal-containing thin film layer is connected simultaneously with the pair of through electrode, and

wherein one sidewall of the metal-containing thin film layer is aligned with one sidewall of the conductive pillar.

13. A semiconductor chip comprising:

a body portion with a front surface and a rear surface;

an insulating layer disposed over the rear surface of the body portion;

a pair of through electrodes penetrating the body portion and the insulating layer;

a metal-containing thin film layer disposed over the insulating layer and connected simultaneously with the pair of through electrodes; and

a rear connection electrode disposed over the metal-containing thin film layer and connected to the metal-containing thin film layer,

wherein the metal-containing thin film layer includes an undercut that is formed under a sidewall of the rear connection electrode due to the metal-containing thin film layer being recessed, and

wherein a width of the rear connection electrode is equal to or greater than a sum of widths of the pair of through electrodes, a distance between the pair of through electrodes, and a width of the undercut.

14. The semiconductor chip according to claim 13 , wherein the pair of through electrodes receives power.

15. The semiconductor chip according to claim 14 , further comprising:

a signal through electrode penetrating the body portion and the insulating layer, wherein the signal through electrode transmits a signal; and

a signal rear connection electrode disposed over the insulating layer and connected to the signal through electrode.

16. The semiconductor chip according to claim 13 , further comprising:

a dummy rear connection electrode disposed over the insulating layer, wherein the dummy rear connection electrode is in an electrically floating state.

17. The semiconductor chip according to claim 13 , wherein one sidewall of the metal-containing thin film layer is aligned with one sidewall of one of the pair of through electrodes.

18. The semiconductor chip according to claim 13 , wherein each of the pair of through electrodes includes a conductive pillar and a spacer insulating layer that surround a sidewall of the conductive pillar.

19. The semiconductor chip according to claim 18 , wherein one sidewall of the metal-containing thin film layer is aligned with one sidewall of the conductive pillar.

20. A semiconductor chip comprises:

a body portion with a front surface and a rear surface;

an insulating layer disposed over the rear surface of the body portion;

a signal through electrode penetrating the body portion and the insulating layer;

a pair of power through electrodes penetrating the body portion and the insulating layer;

a signal rear connection electrode disposed over the insulating layer;

a power rear connection electrode disposed over the insulating layer;

a first front connection electrode and a second front connection electrode disposed over the front surface of the body portion; and

the signal through electrode is electrically connected with the signal rear connection electrode and first front connection electrode, and

the pair of power through electrodes is electrically connected simultaneously with the power rear connection electrode and the second front connection electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2021
From: SON, HO YOUNG; KIM, SUNG KYU; LEE, MI SEON
To: SK HYNIX INC.
Reel/Frame 055483/0113 →
Priority Claims (1)
KR 10-2020-0159887 · Nov 25, 2020 · national
Continuity (1)
Related Publication 20220165643A1 · May 26, 2022
Cited By (2)
US 12,463,154 US 12,727,494