Power reallocation for memory device
A data storage device including, in one implementation, a number of memory die packages disposed on a substrate within the data storage device. Each memory die package has a die density that includes one or more memory dies. The die density of each memory die package is configured to provide an even thermal distribution across the number of memory die packages. The respective die densities of two memory of the die packages are different from each other.
1. A data storage device, comprising:
a substrate; and
a plurality of memory die packages disposed on the substrate, wherein each memory die package has a die density that includes one or more memory dies;
wherein the die densities of the memory die packages are configured to provide an even thermal distribution across the plurality of memory die packages, and
wherein respective die densities of two memory die packages from the plurality of memory die packages are different from each other.
2. The data storage device of claim 1 , wherein a first die density of a first memory die package from the two memory die packages is greater than a second die density of a second memory die package from the two memory die packages.
3. The data storage device of claim 2 , wherein the first memory die package is positioned in a first area of the data storage device and the second memory die package is positioned in a second area of the data storage device.
4. The data storage device of claim 3 , wherein the first area is determined to be a lower temperature area than the second area based on a thermal analysis of the data storage device.
5. The data storage device of claim 2 , wherein the first die density of the first memory die package from the two memory die packages includes 16 memory dies.
6. The data storage device of claim 2 , wherein the second die density of the second memory die package from the two memory die packages includes 8 memory dies.
7. The data storage device of claim 1 , wherein the even thermal distribution is an average junction temperature for all of the plurality of memory die packages below a predetermined threshold.