Magnetoresistive memory device including a magnesium containing dust layer
Magnetoelectric or magnetoresistive memory cells include a magnesium containing nonmagnetic metal dust layer located between a free layer and a dielectric capping layer.
1. A voltage controlled magnetic anisotropy (VCMA) magnetoelectric memory device comprising a VCMA magnetoelectric memory cell, wherein the VCMA magnetoelectric memory cell comprises:
a first electrode;
a second electrode that is spaced from the first electrode;
a magnetic tunnel junction located between the first electrode and the second electrode, the magnetic tunnel junction comprising a reference layer having a fixed magnetization direction, a free layer, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer;
a voltage controlled magnetic anisotropy (VCMA) dielectric capping layer located between the free layer and the second electrode; and
a magnesium containing nonmagnetic metal dust layer located between the VCMA dielectric capping layer and the free layer,
wherein the nonmagnetic metal dust layer comprises an alloy of magnesium and aluminum, and
wherein the nonmagnetic metal dust layer and has a material composition of Mg 1-x Al x , wherein x is in a range from 0.2 to 0.8.
2. The VCMA magnetoelectric memory device of claim 1 , wherein the nonmagnetic metal dust layer has a thickness in a range from 0.05 nm to 1 nm.
3. The VCMA magnetoelectric memory device of claim 2 , wherein the nonmagnetic metal dust layer has a sub-monolayer thickness and includes openings therethrough.
4. The VCMA magnetoelectric memory device of claim 2 , wherein the nonmagnetic metal dust layer is a discontinuous material layer including multiple clusters that do not contact one another.
5. The VCMA magnetoelectric memory device of claim 1 , wherein:
a ratio of a voltage controlled magnetic anisotropy (VCMA) coefficient of the VCMA magnetoelectric memory device to a VCMA coefficient within a comparative exemplary VCMA magnetoelectric memory device is in a range from 3 to 5; and
the comparative exemplary VCMA magnetoelectric memory device is the same as the VCMA magnetoelectric memory device except that the comparative exemplary VCMA magnetoelectric memory device lacks the nonmagnetic metal dust layer.
6. The VCMA magnetoelectric memory device of claim 1 , wherein the VCMA dielectric capping layer consists essentially of at least one transition-metal-containing dielectric metal oxide material.
7. The VCMA magnetoelectric memory device of claim 6 , wherein the VCMA dielectric capping layer comprises a dielectric material selected from magnesium oxide, at least one transition-metal-containing dielectric metal oxide material, or a ternary dielectric oxide material including at least two metal elements.
8. The VCMA magnetoelectric memory device of claim 7 , wherein the at least one ternary dielectric oxide material comprises a material selected from strontium titanate, barium titanate, barium strontium titanate, lead zirconate titanate, lead lanthanum titanate, lead lanthanum titanate zirconate, lead lanthanum zirconate, bismuth ferrite or calcium copper titanate.
9. The VCMA magnetoelectric memory device of claim 1 , wherein:
the dielectric capping layer has a thickness in a range from 2 nm to 5 nm; and
the nonmagnetic tunnel barrier layer comprises magnesium oxide and has a thickness in a range from 0.6 nm to 1.2 nm.
10. The VCMA magnetoelectric memory device of claim 1 , wherein a thickness to dielectric constant ratio of the VCMA dielectric capping layer is greater than a thickness to dielectric constant ratio of the nonmagnetic tunnel barrier layer such that a potential difference across the VCMA dielectric capping layer is greater than a potential different across the nonmagnetic tunnel barrier layer during the application of a voltage between the first electrode and the second electrode.
11. The VCMA magnetoelectric memory device of claim 1 , further comprising a synthetic antiferromagnet (SAF) structure comprising a stack of a hard ferromagnetic layer, an antiferromagnetic coupling layer, and the reference layer, the SAF structure being located between the first electrode and the nonmagnetic tunnel barrier layer.
12. The VCMA magnetoelectric memory device of claim 1 , wherein a critical magnetic field of the VCMA magnetoelectric memory device is at least 5,000 Oe.
13. The VCMA magnetoelectric memory device of claim 1 , wherein a figure of merit which comprises a product of a magnetic anisotropy constant K u of the free layer and thickness of the free layer is at least 18 erg/cc.
14. The VCMA magnetoelectric memory device of claim 1 , further comprising a control circuit that is configured to perform a programming operation by applying a programming voltage between the first electrode and the second electrode, wherein the programming voltage has a same polarity for a first magnetization state in which the free layer and the reference layer have parallel magnetization directions and for a second magnetization state in which the free layer and the reference layer have antiparallel magnetization directions.
15. A method of programming a VCMA magnetoelectric memory device comprising a VCMA magnetoelectric memory cell, wherein the VCMA magnetoelectric memory cell comprises:
a first electrode;
a second electrode that is spaced from the first electrode;
a magnetic tunnel junction located between the first electrode and the second electrode, the magnetic tunnel junction comprising a reference layer having a fixed magnetization direction, a free layer, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer;
a voltage controlled magnetic anisotropy (VCMA) dielectric capping layer located between the free layer and the second electrode; and
a magnesium containing nonmagnetic metal dust layer located between the VCMA dielectric capping layer and the free layer,
the method comprising:
applying a first programming voltage of a first polarity between the first electrode and the second electrode to switch a first magnetization state of the free layer in which the free layer and the reference layer have parallel magnetization directions to a second magnetization state of the free layer in which the free layer and the reference layer have antiparallel magnetization directions; and
applying a second programming voltage of the first polarity between the first electrode and the second electrode to switch the second magnetization state of the free layer to the first magnetization state of the free layer,
wherein:
the first programming voltage and the second programming voltage generate an electric field in the VCMA dielectric capping layer which induces precession in the free layer; and
the first programming voltage has a magnitude in a range from 500 mV to 3 V.
16. A method of programming a VCMA magnetoelectric memory device comprising a VCMA magnetoelectric memory cell, wherein the VCMA magnetoelectric memory cell comprises:
a first electrode;
a second electrode that is spaced from the first electrode;
a magnetic tunnel junction located between the first electrode and the second electrode, the magnetic tunnel junction comprising a reference layer having a fixed magnetization direction, a free layer, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer;
a voltage controlled magnetic anisotropy (VCMA) dielectric capping layer located between the free layer and the second electrode; and
a magnesium containing nonmagnetic metal dust layer located between the VCMA dielectric capping layer and the free layer,
the method comprising:
applying a first programming voltage of a first polarity between the first electrode and the second electrode to switch a first magnetization state of the free layer in which the free layer and the reference layer have parallel magnetization directions to a second magnetization state of the free layer in which the free layer and the reference layer have antiparallel magnetization directions,
wherein the nonmagnetic metal dust layer comprises an alloy of magnesium and aluminum.
17. A voltage controlled magnetic anisotropy (VCMA) magnetoelectric memory device comprising a VCMA magnetoelectric memory cell, wherein the VCMA magnetoelectric memory cell comprises:
a first electrode;
a second electrode that is spaced from the first electrode;
a magnetic tunnel junction located between the first electrode and the second electrode, the magnetic tunnel junction comprising a reference layer having a fixed magnetization direction, a free layer, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer;
a voltage controlled magnetic anisotropy (VCMA) dielectric capping layer located between the free layer and the second electrode; and
a magnesium containing nonmagnetic metal dust layer located between the VCMA dielectric capping layer and the free layer,
wherein:
a ratio of a voltage controlled magnetic anisotropy (VCMA) coefficient of the VCMA magnetoelectric memory device to a VCMA coefficient within a comparative exemplary VCMA magnetoelectric memory device is in a range from 3 to 5; and
the comparative exemplary VCMA magnetoelectric memory device is the same as the VCMA magnetoelectric memory device except that the comparative exemplary VCMA magnetoelectric memory device lacks the nonmagnetic metal dust layer.
18. A voltage controlled magnetic anisotropy (VCMA) magnetoelectric memory device comprising a VCMA magnetoelectric memory cell, wherein the VCMA magnetoelectric memory cell comprises:
a first electrode;
a second electrode that is spaced from the first electrode;
a magnetic tunnel junction located between the first electrode and the second electrode, the magnetic tunnel junction comprising a reference layer having a fixed magnetization direction, a free layer, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer;
a voltage controlled magnetic anisotropy (VCMA) dielectric capping layer located between the free layer and the second electrode; and
a magnesium containing nonmagnetic metal dust layer located between the VCMA dielectric capping layer and the free layer,
wherein a thickness to dielectric constant ratio of the VCMA dielectric capping layer is greater than a thickness to dielectric constant ratio of the nonmagnetic tunnel barrier layer such that a potential difference across the VCMA dielectric capping layer is greater than a potential different across the nonmagnetic tunnel barrier layer during the application of a voltage between the first electrode and the second electrode.