IP Library Granted Patent US 11,403,011
Granted Patent B1
US 11,403,011 · App. 17/222,565 · Granted Aug 2, 2022

Host memory buffer allocation management

Inventors: Sridhar Prudvi Raj Gunda (Karnataka, IN); Santhosh Kumar Siripragada (Karnataka, IN)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G06F3/0631G06F3/0604G06F3/0656G06F3/0673G06F12/0253G06F12/0292
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Quick Facts
Patent No.
US 11,403,011
App. No.
17/222,565
Granted
Aug 2, 2022
Kind
B1
Abstract

Aspects of a storage device including a memory and a controller are provided. The memory includes a volatile memory. The controller can determine that at least a portion in the volatile memory is a reusable region based on a host memory allocation from a host device. The controller also can calculate a size of the reusable region in the volatile memory. The controller also can perform one or more storage device operations in the reusable region of the volatile memory in response to the host memory allocation based on the calculated size of the reusable region. Thus, the controller may provide smart handling of host memory buffer allocation, thereby improving storage device read performance.

Claims (69)

1. A storage device, comprising:

a memory including a volatile memory; and

a controller configured to:

determine that at least a portion in the volatile memory is a reusable region based on a host memory allocation from a host device;

calculate a size of the reusable region in the volatile memory; and

perform one or more storage device operations in the reusable region of the volatile memory in response to the host memory allocation based on the calculated size of the reusable region.

2. The storage device of claim 1 , wherein the controller is further configured to determine whether the storage device supports host memory buffer (HMB) allocation.

3. The storage device of claim 2 , wherein the controller is further configured to:

send, to the host device, a request for the HMB allocation for one or more internal modules associated with the controller, in response to the storage device being determined to support the HMB allocation; and

receive, from the host device, a response indicating whether the HMB allocation is successful.

4. The storage device of claim 1 , wherein the controller is further configured to:

allocate, from the host memory allocation, the reusable region in the volatile memory for an internal module of the controller based on a corresponding priority of the internal module; and

fetch the allocated reusable region in the volatile memory for the internal module.

5. The storage device of claim 1 , wherein the determination that the at least a portion in the volatile memory is reusable comprises to:

calculate a first amount of memory freed in the at least a portion of the volatile memory based on the host memory allocation;

determine a second amount of memory used to perform the one or more storage device operations associated with an internal module of the controller; and

determine that the first amount of memory is greater than the second amount of memory.

6. The storage device of claim 1 , wherein the performance of the one or more storage device operations comprises to load one or more of an inverse storage address table information or relocation information associated with a garbage collection operation in the reusable region of the volatile memory.

7. The storage device of claim 1 , wherein the performance of the one or more storage device operations comprises to load one or more mapping tables in the reusable region of the volatile memory associated with the one or more storage device operations.

8. The storage device of claim 7 , wherein the one or more storage device operations comprises one or more of a random read operation, a sequential read operation, a random write operation, a sequential write operation or a relocation operation.

9. The storage device of claim 1 , wherein the performance of the one or more storage device operations comprises to allocate one or more host buffers associated with the one or more storage device operations in the reusable region of the volatile memory.

10. The storage device of claim 1 , wherein the controller is further configured to:

determine to release an allocated region of a host memory that corresponds to the host memory allocation;

identify one or more internal modules associated with the controller which are using the allocated region of the host memory;

determine whether the reusable region in the volatile memory associated with the host memory allocation is reused by the identified one or more internal modules;

evict one or more sets of data from the reusable region of the volatile memory when the reusable region is determined to be reused; and

release the allocated region of the host memory to the host device.

11. A storage device, comprising:

a memory including a volatile memory; and

a controller configured to:

determine that at least a portion in the volatile memory is a reusable region based on a host memory allocation from a host device;

calculate a size of the reusable region in the volatile memory;

perform one or more storage device operations in the reusable region of the volatile memory in response to the host memory allocation based on the calculated size of the reusable region; and

release the host memory allocation to the host device.

12. The storage device of claim 11 , wherein the controller is further configured to determine whether the storage device supports host memory buffer (HMB) allocation.

13. The storage device of claim 12 , wherein the controller is further configured to:

send, to the host device, a request for the HMB allocation for one or more internal modules associated with the controller, in response to the storage device being determined to support the HMB allocation; and

receive, from the host device, a response indicating whether the HMB allocation is successful.

14. The storage device of claim 11 , wherein the controller is further configured to:

allocate, from the host memory allocation, the reusable region in the volatile memory for an internal module of the controller based on a corresponding priority of the internal module; and

fetch the allocated reusable region in the volatile memory for the internal module.

15. The storage device of claim 11 , wherein the controller is further configured to:

determine to release an allocated region of a host memory that corresponds to the host memory allocation;

identify one or more internal modules associated with the controller which are using the allocated region of the host memory;

determine whether the reusable region in the volatile memory associated with the host memory allocation is reused by the identified one or more internal modules; and

evict one or more sets of data from the reusable region of the volatile memory when the reusable region is determined to be reused.

16. The storage device of claim 11 , wherein the performance of the one or more storage device operations comprises to load one or more mapping tables in the reusable region of the volatile memory associated with the one or more storage device operations, and wherein the one or more storage device operations comprises one or more of a random read operation, a sequential read operation, a random write operation, a sequential write operation or a relocation operation.

17. A storage device, comprising:

a memory including a volatile memory; and

a controller configured to:

determine whether the storage device supports host memory buffer (HMB) allocation;

send, to a host device, a request for the HMB allocation for one or more internal modules associated with the controller, in response to the storage device being determined to support the HMB allocation;

receive, from the host device, a response indicating whether the HMB allocation is successful;

determine that at least a portion in the volatile memory is a reusable region when the HMB allocation with the host device is successful;

calculate a size of the reusable region in the volatile memory;

perform one or more storage device operations in the reusable region of the volatile memory in response to the HMB allocation based on the calculated size of the reusable region; and

release the HMB allocation back to the host device.

18. The storage device of claim 17 , wherein the controller is further configured to:

allocate, from the HMB allocation, the reusable region in the volatile memory for an internal module of the controller based on a corresponding priority of the internal module; and

fetch the allocated reusable region in the volatile memory for the internal module.

19. The storage device of claim 17 , wherein the determination that the at least a portion in the volatile memory is reusable comprises to:

calculate a first amount of memory freed in the at least a portion of the volatile memory based on the HMB allocation;

determine a second amount of memory used to perform the one or more storage device operations associated with an internal module of the controller; and

determine that the first amount of memory is greater than the second amount of memory.

20. The storage device of claim 17 , wherein the controller is further configured to:

determine to release an allocated region of a host memory that corresponds to the HMB allocation;

identify one or more internal modules associated with the controller which are using the allocated region of the host memory;

determine whether the reusable region in the volatile memory associated with the HMB allocation is reused by the identified one or more internal modules; and

evict one or more sets of data from the reusable region of the volatile memory when the reusable region is determined to be reused.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2021
From: GUNDA, SRIDHAR PRUDVI RAJ; SIRIPRAGADA, SANTHOSH KUMAR
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 057220/0153 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
Cited By (5)
US 12,423,203 US 12,505,048 US 12,619,379 US 12,639,213 US 12,710,873