IP Library Granted Patent US 11,652,010
Granted Patent B2
US 11,652,010 · App. 17/305,624 · Granted May 16, 2023

Semiconductor substrate crack mitigation systems and related methods

Inventor: Michael J. Seddon (Gilbert, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L22/22H01L21/2636H01L23/564
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Quick Facts
Patent No.
US 11,652,010
App. No.
17/305,624
Granted
May 16, 2023
Kind
B2
Abstract

Implementations of a method for healing a crack in a semiconductor substrate may include identifying a crack in a semiconductor substrate and heating an area of the semiconductor substrate including the crack until the crack is healed.

Claims (28)

1. A method for healing a crack in a semiconductor substrate, the method comprising:

identifying a crack in a semiconductor substrate;

heating an area of the semiconductor substrate comprising the crack until the crack is healed;

coupling the semiconductor substrate to a carrier substrate;

completing processing of the semiconductor substrate while coupled to the carrier substrate; and

forming a plurality of semiconductor die therefrom.

2. The method of claim 1 , wherein the semiconductor substrate comprises silicon carbide.

3. The method of claim 1 , further comprising electronically identifying the area of the semiconductor substrate comprising the crack after the crack is healed.

4. The method of claim 1 , further comprising forming a same crystal orientation of the heated area of the semiconductor substrate as a remainder of the semiconductor substrate through one of controlled cooling, controlled heating, and controlled heating and controlled cooling of the heated area of the semiconductor substrate.

5. The method of claim 1 , further comprising forming a different crystal orientation of the heated area of the semiconductor substrate as a remainder of the semiconductor substrate through one of controlled cooling, controlled heating, and controlled heating and controlled cooling of the heated area of the semiconductor substrate.

6. The method of claim 1 , wherein a laser is used to heat an area of the semiconductor substrate.

7. The method of claim 1 , further comprising electronically identifying the area of the semiconductor substrate comprising the crack and only heating substantially the area of the semiconductor substrate electronically identified.

8. The method of claim 1 , wherein heating the area of the semiconductor substrate comprising the crack until the crack is healed comprises localized heating of the area of the semiconductor substrate comprising the crack until the crack is healed.

9. The method of claim 1 , wherein heating the area of the semiconductor substrate comprising the crack until the crack is healed comprises heating the entire semiconductor substrate.

10. The method of claim 1 , wherein the crack extends to an edge of the semiconductor substrate.

11. The method of claim 1 , wherein the crack is an internal crack.

12. A method for mitigating propagation of a crack in a semiconductor substrate, the method comprising:

identifying a crack in a semiconductor substrate;

removing a portion of the semiconductor substrate comprising the crack;

forming a filled area by filling, with a fill material, an area of the semiconductor substrate from where the portion of the semiconductor substrate comprising the crack was removed;

electronically identifying the filled area; and

forming a plurality of semiconductor die from the semiconductor substrate excluding the filled area.

13. The method of claim 12 , wherein the semiconductor substrate comprises silicon carbide.

14. The method of claim 12 , wherein removing a portion of the semiconductor substrate comprises etching the portion of the semiconductor substrate.

15. The method of claim 12 , wherein removing a portion of the semiconductor substrate comprises polishing a sidewall of the semiconductor substrate.

16. The method of claim 12 , further comprising coupling the semiconductor substrate to a carrier substrate.

17. The method of claim 12 , wherein the crack extends to an edge of the semiconductor substrate.

18. The method of claim 12 , wherein the crack is an internal crack.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 058828, FRAME 0123 Recorded Aug 16, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064615/0449 →
SECURITY INTEREST Recorded Jul 13, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; GTAT CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064271/0971 →
SECURITY INTEREST Recorded Nov 5, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058828/0123 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2021
From: SEDDON, MICHAEL J.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 056825/0536 →
Continuity (3)
Continuation 16784687 · Feb 7, 2020
Continuation 15964484 · Apr 27, 2018
Related Publication 20210343604A1 · Nov 4, 2021