IP Library Granted Patent US 11,569,155
Granted Patent B2
US 11,569,155 · App. 17/343,069 · Granted Jan 31, 2023

Substrate bonding pad having a multi-surface trace interface

Inventors: Chih-Chin Liao (Changhua, TW); Cheng-Hsiung Yang (Hsinchu, TW)
Assignee: Western Digital Technologies, Inc.
H01L23/49811H01L23/49866H05K1/111H05K2201/099H05K2201/0989H05K2201/10734
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Quick Facts
Patent No.
US 11,569,155
App. No.
17/343,069
Granted
Jan 31, 2023
Kind
B2
Abstract

A bonding pad such as for a ball grid array includes a conductive pad having a top surface and a first interface surface in contact with a signal trace of a substrate, and a plating layer having a bottom surface in direct contact with the top surface of the conductive pad. The plating layer includes one or more protrusions extending toward the signal trace in a direction generally parallel to a longitudinal axis of the signal trace. Each of the one or more protrusions includes two parallel sidewalls extending upwardly from the bottom surface of the plating layer, and a second interface surface contiguous with the bottom surface of the plating layer. The second interface surface is positioned over and in direct contact with a top surface of the signal trace. The protrusions prevent the connection to the signal trace from being compromised.

Claims (31)

1. A bonding pad, comprising:

a conductive pad having a first interface surface in contact with a signal trace of a substrate; and

a plating layer having a bottom surface in direct contact with the conductive pad, and one or more protrusions extending toward the signal trace in a direction generally parallel to a longitudinal axis of the signal trace, the one or more protrusions having a width extending in a direction perpendicular to the longitudinal axis and which is less than a width of the signal trace, and wherein the one or more protrusions extend into one or more apertures defined by a solder mask of the substrate,

wherein each of the one or more protrusions include two parallel sidewalls extending upwardly from the bottom surface of the plating layer, and a second interface surface contiguous with the bottom surface of the plating layer, the second interface surface being disposed over and in direct contact with a top surface of the signal trace.

2. The bonding pad of claim 1 , wherein the plating layer is a nickel-gold plating layer.

3. The bonding pad of claim 1 , wherein the one or more protrusions includes a first protrusion and a second protrusion.

4. The bonding pad of claim 3 , wherein the first protrusion and second protrusion extend outwardly from the plating layer generally parallel to one another.

5. The bonding pad of claim 3 , wherein the first protrusion and second protrusion extend outwardly from the plating layer at generally the same length.

6. The bonding pad of claim 3 , wherein the first protrusion and second protrusion extend outwardly from the plating layer at unequal lengths.

7. The bonding pad of claim 3 , wherein the first protrusion and second protrusion are symmetric about the longitudinal axis.

8. The bonding pad of claim 3 , wherein the first protrusion has a width extending in a direction perpendicular to the longitudinal axis and second protrusion has a width extending in a direction perpendicular to the longitudinal axis, wherein a combined width of the first protrusion and second protrusion is less than a width of the signal trace.

9. The bonding pad of claim 1 , wherein the one or more protrusions have a generally rectangular cross-sectional shape.

10. The bonding pad of claim 1 , wherein a top surface of the one or more protrusions is covered by a solder mask of the substrate.

11. A substrate bonding pad, comprising:

conducting means for electrically coupling a solder ball to a trace of the substrate, the conducting means having a first interface means for electrically connecting to the trace; and

plating means covering a surface of the conducting means for protecting the conducting means from corrosion and/or providing strength to the conducting means, the plating means electrically coupling the solder ball to the conducting means, the plating means having protrusion means for directly contacting the trace, the protrusion means having a second interface means for electrically connecting to the trace separate and distinct from the first interface means,

wherein the protrusion means having a width extending in a direction perpendicular to a longitudinal axis of the trace and which is less than a width of the trace, and wherein the protrusion means extend into one or more apertures defined by a solder mask means of the substrate.

12. The substrate bonding pad of claim 11 , wherein the plating means comprises a first plating means and a second plating means for directly contacting the trace of the substrate with second and third interface surface areas respectively.

13. The substrate bonding pad of claim 12 , wherein the second and third interface surface areas are equal.

14. The substrate bonding pad of claim 12 , wherein the second and third interface surface areas are unequal.

15. A substrate, comprising:

an insulating layer configured to provide electrical insulation between electrically conductive elements of the substrate;

a signal trace coupled to a top surface of the insulating layer;

a solder mask in direct contact with a top surface of the signal trace, the solder mask defining a solder mask opening; and

a bonding pad positioned within the solder mask opening, the bonding pad configured to directly contact the signal trace within two or more interface surface areas, the two or more interface surface areas being separate and distinct from one another, the bonding pad comprising:

a conductive pad having a first interface surface in contact with a signal trace of the substrate; and

a plating layer having a bottom surface in direct contact with the conductive pad, and one or more protrusions extending toward the signal trace in a direction generally parallel to a longitudinal axis of the signal trace, the one or more protrusions having a width extending in a direction perpendicular to the longitudinal axis and which is less than a width of the signal trace, and wherein the one or more protrusions extend into one or more apertures defined by a solder mask of the substrate,

wherein each of the one or more protrusions include two parallel sidewalls extending upwardly from the bottom surface of the plating layer, and a second interface surface contiguous with the bottom surface of the plating layer, the second interface surface being disposed over and in direct contact with a top surface of the signal trace.

16. The substrate of claim 15 , wherein the solder mask opening includes one or more apertures configured to receive the one or more protrusions of the bonding pad.

17. The substrate of claim 15 , wherein the one or more protrusions includes a first protrusion and a second protrusion spaced from one another in a direction perpendicular to the longitudinal axis.

18. The substrate of claim 15 , wherein a top surface of the one or more protrusions is covered by the solder mask.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 057651 FRAME 0296 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058981/0958 →
SECURITY INTEREST Recorded Sep 17, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 057651/0296 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2021
From: LIAO, CHIH-CHIN; YANG, CHENG-HSIUNG
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 056502/0835 →
Cited By (1)
US 12,690,130