Polishing pad, preparation method thereof and method for preparing semiconductor device using same
The embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, to a process for preparing the same, and to a process for preparing a semiconductor device using the same. The polishing pad according to the embodiment adjusts the surface roughness characteristics of the polishing pad after polishing, whereby the polishing rate can be enhanced, and the surface residues, surface scratches, and chatter marks of the wafer can be remarkably reduced.
1. A polishing pad, which satisfies the following Relationships 5 and 6 in the areal material ratio curve based on the ISO 25178-2 standard after 25 dummy wafers are polished for 60 seconds each and two monitoring wafers are polished for 60 seconds each, each of the wafers being a silicon oxide wafer (or PETEOS wafer), while a calcined ceria slurry is sprayed at a rate of 200 cc/min on to the polishing pad, and when the polishing pad after the polishing is measured with an optical surface roughness meter:
Spk/Svk< 1.2 [Relationship 5]
0.1≤ Spk/Sk≤ 1.1 [Relationship 6]
in Relationships 5 and 6, Spk is the reduced peak height, Svk is the reduced valley depth, and Sk is the core roughness depth.
2. The polishing pad of claim 1 , wherein a pre-break-in process is carried out for 10 to 20 minutes before the dummy wafers are polished to condition the polishing layer of the polishing pad.
3. The polishing pad of claim 1 , which satisfies at least one selected from an Spk of 2 to 10, an Svk of greater than 11 to 22, and an Sk of 5 to 40.
4. The polishing pad of claim 1 , wherein the polishing pad after the polishing satisfies at least one selected from the following Relationships 7 to 10:
0.2< Svk/Sk≤ 2.5 [Relationship 7]
0.3< Spk/Svk+Svk/Sk≤ 3.6 [Relationship 8]
0.3< Spk/Sk+Svk/Sk≤ 3.6 [Relationship 9]
0.45≤ Spk/Sk+Svk/Sk+Spk/Svk≤ 4.7 [Relationship 10]
in Relationships 7 to 10, Spk, Svk, and Sk are as defined in claim 1 .
5. The polishing pad of claim 1 , wherein the absolute value of the difference in Svk/Sk between before and after the polishing of the polishing pad is 0.1 to 1.5, and the absolute value of the difference in Spk/Sk between before and after the polishing of the polishing pad is 0 to 0.6.
6. The polishing pad of claim 1 , which comprises a plurality of pores having an average diameter of 5 μm to 200 μm,
wherein the polishing pad satisfies at least one selected from the characteristics of:
a polishing rate of 2,600 Å/min to 3,300 Å/min for an oxide layer;
100 or less of the number of surface residues on the monitoring wafer;
200 or less of the number of surface scratches on the monitoring wafer; and
5 or less of the number of chatter marks on the monitoring wafer.
7. The polishing pad of claim 1 , which comprises a polishing layer comprising a cured product formed from a composition comprising a urethane-based prepolymer, a curing agent, and a foaming agent, and
wherein the foaming agent comprises a solid phase foaming agent, a gas phase foaming agent, or a mixed foaming agent thereof.
8. The polishing pad of claim 7 , wherein the solid phase foaming agent is purified by a purification system for a solid phase foaming agent.
9. The polishing pad of claim 8 , the purified solid phase foaming agent has an average particle diameter (D50) of 5 μm to 200 μm.
10. A process for preparing a polishing pad, which comprises:
mixing a urethane-based prepolymer, a curing agent, and a foaming agent to prepare a raw material mixture; and
injecting the raw material mixture into a mold and curing it to obtain a polishing pad,
wherein the polishing pad satisfies the following Relationships 5 and 6 in the areal material ratio curve based on the ISO 25178-2 standard after 25 dummy wafers are polished for 60 seconds each and two monitoring wafers are polished for 60 seconds each, each of the wafers being a silicon oxide wafer (or PETEOS wafer), while a calcined ceria slurry is sprayed at a rate of 200 cc/min on to the polishing pad, and when the polishing pad after the polishing is measured with an optical surface roughness meter:
Spk/Svk< 1.2 [Relationship 5]
0.1≤ Spk/Sk≤ 1.1 [Relationship 6]
in Relationships 5 and 6, Spk is the reduced peak height, Svk is the reduced valley depth, and Sk is the core roughness depth.
11. A polishing pad, which satisfies the following Relationship 11 in the areal material ratio curve based on the ISO 25178-2 standard after 25 dummy wafers are polished for 60 seconds each and two monitoring wafers are polished for 60 seconds each, each of the wafers being a silicon oxide wafer (or PETEOS wafer), while a calcined ceria slurry is sprayed at a rate of 200 cc/min on to the polishing pad, and when the polishing pad after the polishing is measured with an optical surface roughness meter:
0.5≤( Spk+Svk )/ Sk≤ 3.5 [Relationship 11]
in Relationship 11, Spk is the reduced peak height, Svk is the reduced valley depth, and Sk is the core roughness depth.
12. The polishing pad of claim 11 , wherein a pre-break-in process is carried out for 10 to 20 minutes before the dummy wafers are polished to condition the polishing layer of the polishing pad.
13. The polishing pad of claim 11 , which satisfies at least one selected from an Spk of 2 to 10, an Svk of greater than 11 to 22, an Sk of 5 to 40, and a total sum of Spk and Svk being greater than 13 to 32.
14. The polishing pad of claim 11 , wherein the polishing pad after the polishing satisfies at least one selected from the following Relationships 5 to 10:
Spk/Svk< 1.2 [Relationship 5]
0.1≤ Spk/Sk≤ 1.1 [Relationship 6]
0.2< Svk/Sk≤ 2.5 [Relationship 7]
0.3< Spk/Svk+Svk/Sk≤ 3.6 [Relationship 8]
0.3< Spk/Sk+Svk/Sk≤ 3.6 [Relationship 9]
0.45≤ Spk/Sk+Svk/Sk+Spk/Svk≤ 4.7 [Relationship 10]
in Relationships 5 to 10, Spk, Svk, and Sk are as defined in claim 11 .
15. The polishing pad of claim 14 , wherein the absolute value of the difference in Svk/Sk between before and after the polishing of the polishing pad is 0.1 to 1.5, and the absolute value of the difference in Spk/Sk between before and after the polishing of the polishing pad is 0 to 0.6.
16. The polishing pad of claim 11 , which comprises a plurality of pores having an average diameter of 5 μm to 200 μm,
wherein the polishing pad satisfies at least one selected from the characteristics of:
a polishing rate of 2,600 Å/min to 3,300 Å/min for an oxide layer;
100 or less of the number of surface residues on the monitoring wafer;
200 or less of the number of surface scratches on the monitoring wafer; and
5 or less of the number of chatter marks on the monitoring wafer.
17. A process for preparing a polishing pad, which comprises:
mixing a urethane-based prepolymer, a curing agent, and a foaming agent to prepare a raw material mixture; and
injecting the raw material mixture into a mold and curing it to obtain a polishing pad,
wherein the polishing pad satisfies the following Relationship 11 in the areal material ratio curve based on the ISO 25178-2 standard after 25 dummy wafers are polished for 60 seconds each and two monitoring wafers are polished for 60 seconds each, each of the wafers being a silicon oxide wafer (or PETEOS wafer), while a calcined ceria slurry is sprayed at a rate of 200 cc/min on to the polishing pad, and when the polishing pad after the polishing is measured with an optical surface roughness meter:
0.5≤( Spk+Svk )/ Sk≤ 3.5 [Relationship 11]
in Relationship 11, Spk is the reduced peak height, Svk is the reduced valley depth, and Sk is the core roughness depth.
18. The process for preparing a polishing pad of claim 17 , wherein the foaming agent comprises a solid phase foaming agent, a gas phase foaming agent, or a mixed foaming agent thereof, and the solid phase foaming agent is purified by a purification system for a solid phase foaming agent.
19. The process for preparing a polishing pad of claim 17 , wherein the mixing is carried out using a mixing head at a speed of 500 rpm to 10,000 rpm.
20. The process for preparing a polishing pad of claim 18 , wherein the purified solid phase foaming agent has an average particle diameter (D50) of 5 μm to 200 μm.