IP Library Granted Patent US 11,907,573
Granted Patent B2
US 11,907,573 · App. 17/353,176 · Granted Feb 20, 2024

Performing background operations during host read in solid state memory device

Inventors: Pradeep Sreedhar (Bangalore, IN); Deepak Naik (Bangalore, IN); Bala Siva Kumar Narala (Bangalore, IN); Abhishek Shetty (Shanghai, CN)
Assignee: Western Digital Technologies, Inc.
G06F3/0659G06F3/061G06F3/0604G06F3/0611G06F3/0613G06F3/0679G06F13/1668
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Quick Facts
Patent No.
US 11,907,573
App. No.
17/353,176
Granted
Feb 20, 2024
Kind
B2
Abstract

A SD Card including, in one implementation, a memory array, a controller coupled to the memory array, and a bus for transferring data between the memory array and a host device in communication with the SD Card. The controller is configured to perform background maintenance operations on the memory array during execution of a read command received from the host device.

Claims (57)

1. A SD Card, comprising:

a memory array;

a controller coupled to the memory array; and

a bus for transferring data between the memory array and a host device in communication with the SD Card,

wherein the controller is configured to:

determine a first duration of a host transfer between the memory array and the host device,

determine a second duration of a sector host transfer of a plurality of sector host transfers,

determine a throttle delay based on the first duration and the second duration,

perform one or more data transfer support operations based on the determined throttle delay,

determine a third duration of the one or more data transfer support operations performed during the host transfer,

determine an overhead time for the host transfer based on the first duration and the third duration,

determine an amount of time available for background operations based on the overhead time, and

perform background maintenance operations on the memory array during execution of a read command received from the host device and based on the amount of time available for background operations that is determined.

2. The SD Card of claim 1 , wherein the SD Card is powered down within 5 milliseconds of completing execution of the read command.

3. The SD Card of claim 2 , wherein the SD Card is powered down when not performing the read command or a write command.

4. The SD Card of claim 1 , wherein the background maintenance operations include at least one of:

a read scrub operation,

an EPWR operation, and

an SLC to MLC relocation.

5. The SD Card of claim 1 , wherein the controller is further configured to:

determine a host profile associated with the host device, and

select the sector host transfer rate from the plurality of host transfer rates based on the host profile that is determined.

6. The SD Card of claim 1 , wherein the controller is further configured to:

program a throttling module according to the determined throttle delay.

7. The SD Card of claim 1 , wherein the plurality of host transfer rates includes a rate of thirty megabytes-per-second (MBPS), a rate of sixty MBPS, and a rate of ninety MBPS.

8. A method for performing background maintenance operations on a memory array of a SD Card, the method comprising:

determining, with a controller, a first duration of a host transfer between a memory array and a host device;

determining, with the controller, a second duration of a sector host transfer of a plurality of sector host transfers;

determining, with the controller, a throttle delay based on the first duration and the second duration;

performing, with the controller, one or more data transfer support operations based on the determined throttle delay;

determining, with the controller, a third duration of the one or more data transfer support operations performed during the host transfer;

determining, with the controller, an overhead time for the host transfer based on the first duration and the third duration;

determining, with the controller, an amount of time available for background operations based on the overhead time;

receiving a read command from the host device;

executing the read command with the controller; and

performing, with the controller, the background maintenance operations on the memory array during execution of the read command received from the host device and based on the amount of time available for background operations that is determined.

9. The method of claim 8 , wherein the SD card is powered down within 5 milliseconds of completing execution of the read command.

10. The method of claim 9 , wherein the SD card is powered down when not performing the read command or a write command.

11. The method of claim 8 , wherein the background maintenance operations includes performing at least one of:

a read scrub operation,

an EPWR operation, and

an SLC to MLC relocation.

12. An apparatus for performing background maintenance operations on a memory array of a SD Card, the apparatus comprising:

means for determining a first duration of a host transfer between a memory array and a host device;

means for determining a second duration of a sector host transfer of a plurality of sector host transfers;

a means for determining a throttle delay based on the first duration and the second duration;

means for performing one or more data transfer support operations based on the determined throttle delay;

means for determining a third duration of the one or more data transfer support operations performed during the host transfer;

means for determining an overhead time for the host transfer based on the first duration and the third duration;

means for determining an amount of time available for background operations based on the overhead time;

means for receiving a read command from the host device; and

means for executing the read command;

means for performing the background maintenance operations on the memory array during execution of the read command received from the host device and based on the amount of time available for background operations that is determined.

13. The apparatus of claim 12 , wherein the background maintenance operations includes performing at least one of:

a read scrub operation,

an EPWR operation, and

an SLC to MLC relocation.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 057651 FRAME 0296 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058981/0958 →
SECURITY INTEREST Recorded Sep 17, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 057651/0296 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2021
From: SREEDHAR, PRADEEP; NAIK, DEEPAK; NARALA, BALA SIVA KUMAR; SHETTY, ABHISHEK
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 056606/0407 →