IP Library Granted Patent US 11,630,720
Granted Patent B2
US 11,630,720 · App. 17/357,856 · Granted Apr 18, 2023

Error recovery handling

Inventors: Parvaneh Alavi (Irvine, CA); Kai-Lung Cheng (Irvine, CA); Yun-Tzuo Lai (Irvine, CA); Haining Liu (Irvine, CA)
Assignee: Western Digital Technologies, Inc.
G06F11/0793G06F11/0727
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Quick Facts
Patent No.
US 11,630,720
App. No.
17/357,856
Granted
Apr 18, 2023
Kind
B2
Abstract

A device that provides error recovery handling includes a processor that is configured to receive an error recovery request including error type information and a page address, where the error type information is mapped to a first error recovery technique. The processor may be configured to determine whether an error count associated with the flash memory circuit satisfies a first criterion and an error map associated with the flash memory circuit satisfies a second criterion, where the error count indicates a number of read errors that have occurred and the error map indicates blocks in which the read errors have occurred. The processor may be configured to utilize a second technique to attempt to recover data when the first and second criterions are satisfied, otherwise utilize the first technique to attempt to recover data, where the second technique is associated with recovering data stored in an offline flash memory circuit.

Claims (72)

1. A data storage system, comprising:

non-volatile memory; and

one or more controllers configured to cause:

in response to receiving an error recovery request with respect to the non-volatile memory, wherein the error recovery request comprises error type information, and the error type information is mapped to a first error recovery technique, the one or more controllers are configured to cause:

determining whether an error count associated with the non-volatile memory satisfies an error count criterion, the error count indicating a number of errors that have occurred on the non-volatile memory;

in response to determining that the error count criterion is not satisfied, utilizing the first error recovery technique or a second error recovery technique that is different from the first error recovery technique;

in response to determining that the error count criterion is satisfied, determining whether an error map associated with the non-volatile memory satisfies an error map criterion, the error map indicating one or more areas of the non-volatile memory in which the errors have occurred; and

in response to determining that the error count criterion and the error map criterion are satisfied, utilizing a third error recovery technique to recover data stored in the non-volatile memory,

wherein the third error recovery technique is different from the second error recovery technique.

2. The data storage system of claim 1 , wherein:

the first error recovery technique is associated with a first error type;

the second error recovery technique is associated with a second error type;

the third error recovery technique is associated with a third error type;

the second error type is more severe than the first error type; and

the third error type is more severe than the second error type.

3. The data storage system of claim 1 , wherein the one or more controllers are configured to cause: in response to determining that the error count criterion is not satisfied, bypassing determining whether the error map associated with the non-volatile memory satisfies the error map criterion.

4. The data storage system of claim 1 , wherein the one or more controllers are configured to cause:

when the error count associated with the non-volatile memory exceeds a first threshold, determining that the error count criterion is satisfied; and

when the error map indicates that at least a number of one or more blocks of the non-volatile memory in which the errors have occurred exceeds a second threshold, determining that the error map criterion is satisfied.

5. The data storage system of claim 1 , wherein the one or more controllers are configured to cause: incrementing the error count associated with the non-volatile memory prior to determining whether the error count satisfies the error count criterion.

6. The data storage system of claim 5 , wherein the one or more controllers are configured to cause:

determining a block of the non-volatile memory where one or more of the errors have occurred; and

updating the error map associated with the non-volatile memory to indicate that the one or more of the errors have occurred in the block of the non-volatile memory, prior to determining whether the error map associated with the non-volatile memory satisfies the error map criterion.

7. The data storage system of claim 1 , wherein the one or more controllers are configured to cause: utilizing the third error recovery technique to attempt to recover the data stored in the non-volatile memory when the error count criterion and the error map criterion are satisfied irrespective of whether the non-volatile memory is offline.

8. The data storage system of claim 1 , wherein:

the one or more controllers are configured to cause: resetting, on a periodic basis, the error count associated with the non-volatile memory and the error map associated with the non-volatile memory; and

the one or more controllers are prevented from resetting an indication whether the non-volatile memory is offline or potentially offline on the periodic basis.

9. The data storage system of claim 1 , wherein the one or more controllers are configured to cause:

determining whether the non-volatile memory has been identified as potentially offline when the error count criterion and the error map criterion are satisfied; and

identifying the non-volatile memory as offline, when the error count criterion and the error map criterion are satisfied and the non-volatile memory has been identified as potentially offline; and

identifying the non-volatile memory as potentially offline, when the error count criterion and the error map criterion are satisfied and the non-volatile memory has not been identified as potentially offline.

10. The data storage system of claim 1 , wherein the one or more controllers are configured to cause:

determining whether the non-volatile memory is identified as offline; and

utilizing the third error recovery technique to attempt to recover the data from the non-volatile memory when the non-volatile memory is identified as offline without determining whether the error count criterion is satisfied and without determining whether the error map criterion is satisfied.

11. The data storage system of claim 1 , comprising one or more memories configured to store the error count associated with the non-volatile memory and the error map associated with the non-volatile memory, wherein the error map associated with the non-volatile memory comprises a bitmap.

12. A method for a data storage system, the method comprising:

in response to receiving an error recovery request with respect to non-volatile memory, wherein the error recovery request comprises error type information, and the error type information is mapped to a first error recovery technique:

determining whether an error count associated with the non-volatile memory satisfies an error count criterion, the error count indicating a number of errors that have occurred on the non-volatile memory;

in response to determining that the error count criterion is not satisfied, utilizing the first error recovery technique or a second error recovery technique that is different from the first error recovery technique;

in response to determining that the error count criterion is satisfied, determining whether an error map associated with the non-volatile memory satisfies an error map criterion, the error map indicating one or more areas of the non-volatile memory in which the errors have occurred; and

in response to determining that the error count criterion and the error map criterion are satisfied, utilizing a third error recovery technique to recover data stored in the non-volatile memory,

wherein the third error recovery technique is different from the second error recovery technique.

13. The method of claim 12 , wherein:

the first error recovery technique is associated with a first error type;

the second error recovery technique is associated with a second error type;

the third error recovery technique is associated with a third error type;

the second error type is more severe than the first error type; and

the third error type is more severe than the second error type.

14. The method of claim 12 , comprising: in response to determining that the error count criterion is not satisfied, bypassing determining whether the error map associated with the non-volatile memory satisfies the error map criterion.

15. The method of claim 12 , comprising:

when the error count associated with the non-volatile memory exceeds a first threshold, determining that the error count criterion is satisfied; and

when the error map indicates that at least a number of one or more blocks of the non-volatile memory in which the errors have occurred exceeds a second threshold, determining that the error map criterion is satisfied.

16. The method of claim 12 , comprising: incrementing the error count associated with the non-volatile memory prior to determining whether the error count satisfies the error count criterion.

17. The method of claim 16 , comprising:

determining a block of the non-volatile memory where one or more of the errors have occurred; and

updating the error map associated with the non-volatile memory to indicate that the one or more of the errors have occurred in the block of the non-volatile memory, prior to determining whether the error map associated with the non-volatile memory satisfies the error map criterion.

18. The method of claim 12 , comprising:

determining whether the non-volatile memory is identified as offline; and

utilizing the third error recovery technique to attempt to recover the data from the non-volatile memory when the non-volatile memory is identified as offline without determining whether the error count criterion is satisfied and without determining whether the error map criterion is satisfied.

19. An apparatus, comprising:

in response to receiving an error recovery request with respect to non-volatile memory, wherein the error recovery request comprises error type information, and the error type information is mapped to a first error recovery technique:

means for determining whether an error count associated with the non-volatile memory satisfies an error count criterion, the error count indicating a number of errors that have occurred on the non-volatile memory;

in response to determining that the error count criterion is not satisfied, means for utilizing the first error recovery technique or a second error recovery technique that is different from the first error recovery technique;

in response to determining that the error count criterion is satisfied, means for determining whether an error map associated with the non-volatile memory satisfies an error map criterion, the error map indicating one or more areas of the non-volatile memory in which the errors have occurred; and

in response to determining that the error count criterion and the error map criterion are satisfied, means for utilizing a third error recovery technique to recover data stored in the non-volatile memory,

wherein the third error recovery technique is different from the second error recovery technique.

20. The apparatus of claim 19 , wherein:

the first error recovery technique is associated with a first error type;

the second error recovery technique is associated with a second error type;

the third error recovery technique is associated with a third error type;

the second error type is more severe than the first error type; and

the third error type is more severe than the second error type.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 057651 FRAME 0296 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058981/0958 →
SECURITY INTEREST Recorded Sep 17, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 057651/0296 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2021
From: ALAVI, PARVANEH; CHENG, KAI-LUNG; LAI, YUN-TZUO; LIU, HAINING
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 056782/0603 →