IP Library Granted Patent US 11,622,431
Granted Patent B2
US 11,622,431 · App. 17/363,000 · Granted Apr 4, 2023

Method and apparatus to control bi-color LEDs on enterprise and datacenter solid state drive (E3) form factor

Inventor: Tenzin Namgyal Maya (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
H05B45/44
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Quick Facts
Patent No.
US 11,622,431
App. No.
17/363,000
Granted
Apr 4, 2023
Kind
B2
Abstract

Systems and methods are disclosed for controlling the operation of visual indicators, such as light emitting diodes (LEDs). A novel circuit may be employed to energize one indicator while de-energizing a second indicator, and vice versa. The novel circuit uses at least one switching component to perform a switching operation on the indicators.

Claims (34)

1. An electrical circuit comprising:

a first light emitting diode (LED) having a first color responsive to being energized;

a second LED having a second, different color responsive to being energized, the second LED and the first LED having a common anode;

a first switching device, an output of the first switching device coupled to the common anode of the first and second LEDs; and

a second switching device, a control input of the second switching device coupled to a cathode of the first LED through a first predetermined impedance and an input of the second switching device coupled to a cathode of the second LED through a second predetermined impedance, such that when the first LED is energized the second LED is de-energized and when the second LED is energized the first LED is de-energized.

2. The electrical circuit of claim 1 , further comprising a source voltage lead coupled to an input of the first switching device via a third predetermined impedance.

3. The electrical circuit of claim 1 , further comprising an LED control lead configured to transmit a switching control signal arranged to energize the first LED or the second LED, based on a value of the signal, the LED control lead coupled to the control input of the second switching device via the first predetermined impedance.

4. The electrical circuit of claim 3 , wherein the LED control lead is coupled to the cathode of the first LED.

5. The electrical circuit of claim 3 , wherein the second LED is energized and the first LED is de-energized responsive to the switching control signal having a voltage value of at least a first predetermined voltage, and wherein the first LED is energized and the second LED is de-energized responsive to the switching control signal having a voltage value of less than a second predetermined voltage, the second predetermined voltage being less than the first predetermined voltage.

6. The electrical circuit of claim 1 , further comprising a blocking diode coupled in parallel with the first LED, the blocking diode having a polarity opposite to the first LED.

7. The electrical circuit of claim 1 , wherein the first LED and the second LED have a common package.

8. The electrical circuit of claim 1 , wherein the first predetermined impedance and the second predetermined impedance comprise first and second resistors, respectively.

9. The electrical circuit of claim 1 , wherein the first and second impedances are selected such that a maximum circuit current is less than 20 mA.

10. An electrical circuit comprising:

a first visual indicator having a first color responsive to being energized;

a second visual indicator having a second, different color responsive to being energized, the second indicator and the first indicator having a common anode;

a first transistor, an output of the first transistor coupled to the common anode of the first and second indicators;

a second transistor, a base or gate of the second transistor coupled to a cathode of the first indicator via a first predetermined impedance and an input of the second transistor coupled to a cathode of the second indicator via a second predetermined impedance; and

an indicator control lead configured to carry a switching control signal to the base or gate of the second transistor via the first predetermined impedance, the switching control signal arranged to trigger the first or second indicator to energize, based on a value of the signal.

11. The electrical circuit of claim 10 , further comprising a source voltage lead coupled to an input of the first transistor via a third predetermined impedance.

12. The electrical circuit of claim 11 , wherein the second indicator is configured to illuminate independent of the presence of a voltage at the source voltage lead.

13. The electrical circuit of claim 11 , wherein when the first indicator is energized the second indicator is de-energized and when the second indicator is energized the first indicator is de-energized.

14. The electrical circuit of claim 10 , further comprising a blocking diode coupled in parallel with the first indicator, the blocking diode having a polarity opposite to a polarity of the first indicator.

15. The electrical circuit of claim 10 , wherein the electrical circuit consists of a minimal number of discrete parts, including one dual light emitting diode (LED) with common anode, one dual NPN bipolar junction transistor (BJT), four resistors, and one diode.

16. An electrical circuit comprising:

a first illuminating indicator having a first color responsive to being energized;

a second illuminating indicator having a second, different color responsive to being energized, the second indicator and the first indicator having a common anode;

an indicator control means, a first lead of the indicator control means coupled to the common anode of the first and second indicators;

a first voltage dividing resistor coupled in series with the first indicator;

a second voltage dividing resistor coupled in series with the second indicator, and a cathode of the second indicator being coupled to the indicator control means via the second voltage dividing resistor; and

an indicator control lead configured to carry a switching control signal to the indicator control means, the signal arranged to trigger the first or second indicator to energize, based on a value of the signal, such that responsive to the control lead being asserted the second indicator is energized and the first indicator is de-energized and responsive to the control lead being de-asserted the first indicator is energized and the second indicator is de-energized.

17. The electrical circuit of claim 16 , wherein the first voltage dividing resistor is disposed between the first indicator and a control input of the indicator control means.

18. The electrical circuit of claim 16 , wherein at least one of the first and second indicators comprises a light emitting diode (LED).

19. The electrical circuit of claim 16 , wherein the indicator control means comprises a programmable logic device.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 057651 FRAME 0296 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058981/0958 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2022
From: MAYA, TENZIN NAMGYAL
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058863/0750 →
SECURITY INTEREST Recorded Sep 17, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 057651/0296 →