Superjunction power semiconductor devices formed via ion implantation channeling techniques and related methods
Semiconductor devices include a silicon carbide drift region having an upper portion and a lower portion. A first contact is on the upper portion of the drift region and a second contact is on the lower portion of the drift region. The drift region includes a superjunction structure that includes a p-n junction that is formed at an angle of between 10° and 30° from a plane that is normal to a top surface of the drift region. The p-n junction extends within +/−1.5° of a crystallographic axis of the silicon carbide material forming the drift region.
1. A Junction Barrier Schottky (“JBS”) diode, comprising:
a drift region having a first conductivity type; and
a plurality of implanted regions having a second conductivity type in an upper portion of the drift region, where the plurality of implanted regions comprise blocking junctions of the JBS diode,
wherein an upper portion of each of the plurality of implanted regions has a first doping concentration and a lower portion of each of the plurality of implanted regions has a second doping concentration,
wherein the first doping concentration is greater than the second doping concentration, and
wherein the lower portion of each of the plurality of implanted regions is quasi-charge balanced with a respective adjacent portion of the drift region to form a superjunction structure in the drift region.
2. The JBS diode of claim 1 , wherein the lower portion of each of the plurality of implanted regions has a substantially constant doping profile.
3. The JBS diode of claim 1 , wherein the upper portion of each of the plurality of implanted regions extends between about 0.5 and about 1.5 microns into the drift region, and the lower portion of each of the plurality of implanted regions extends for at least 1 micron below its respective upper portion.
4. The JBS diode of claim 3 , further comprising a Schottky contact that comprises tantalum.
5. The JBS diode of claim 1 , wherein the upper portion of each of the plurality of implanted regions has a doping concentration of at least 5×10 17 cm −3 .
6. The JBS diode of claim 1 , wherein the lower portion of each of the plurality of implanted regions has a doping concentration of between 1×10 16 cm −3 and 1−10 17 cm −3 .
7. The JBS diode of claim 1 , wherein the first doping concentration is at least 100 times greater than the second doping concentration.
8. The JBS diode of claim 1 , wherein the drift region comprises a silicon carbide material, and
wherein a first sidewall of each implanted region extends within +/−1.5° of one of the <11-23>, <−1-123>, <1-213>, <−12-13>, <2-1-13> or <−2113> crystallographic axes of the silicon carbide material of the drift region.
9. The JBS diode of claim 1 , wherein each of the plurality of implanted regions having the second conductivity type has a shape that is one of a column shape or a circular shape.
10. The JBS diode of claim 1 , wherein the plurality of implanted regions having the second conductivity type are arranged in a checkboard pattern when viewed in plan view.
11. The JBS diode of claim 1 , wherein the first doping concentration is at least 1000 times greater than the second doping concentration.
12. The JBS diode of claim 1 , wherein the plurality of implanted regions are formed via a channeled ion implantation along the <0001> crystallographic axis.
13. The JBS diode of claim 1 , wherein the channel regions are defined in between the blocking junctions.
14. A semiconductor device, comprising:
a drift region comprising silicon carbide;
a plurality of first regions doped with first conductivity type impurities, each of the plurality of first regions having a first sidewall and a second sidewall that are both slanted at a same angle that is between 6° and 35° from a first plane that is normal to a top surface of the drift region; and
a plurality of second regions that are doped with second conductivity type impurities that are opposite the first conductivity type impurities and arranged adjacent respective ones of the plurality of first regions, each of the plurality of second regions having a first sidewall that is facing and contacting the first sidewall of a respective one of the plurality of first regions,
wherein each of the plurality of first regions comprises an upper portion having a first doping concentration and a lower portion having a second doping concentration that is lower than the first doping concentration, and
wherein the lower portion of each of the plurality of first regions is quasi-charge balanced with a respective adjacent one of the plurality of second regions to form a superjunction structure in the drift region.
15. The semiconductor device of claim 14 , wherein the plurality of first regions and the plurality of second regions each have a ring shape, the plurality of first regions and the plurality of second regions are alternately arranged to form a plurality of superjunction structures.
16. The semiconductor device of claim 14 , wherein the plurality of first regions and the plurality of second regions are alternately arranged in a checkerboard pattern, when viewed in plan, to form a plurality of superjunction structures.
17. The semiconductor device of claim 14 , wherein a charge of the lower portion of each of the plurality of first regions is within 20% of a charge of the portions of the plurality of second regions that are between the lower portions of the plurality of first regions.
18. A semiconductor device, comprising:
a drift region comprising silicon carbide;
a plurality of first regions doped with first conductivity type impurities, each of the plurality of first regions having a first sidewall that is slanted at an angle of between 6° and 35° from a first plane that is normal to a top surface of the drift region; and
a plurality of first regions doped with first conductivity type impurities; and
a plurality of second regions that are doped with second conductivity type impurities that are opposite the first conductivity type impurities and arranged adjacent respective ones of the plurality of first regions, each of the plurality of second regions having a first sidewall that is facing and contacting the first sidewall of a respective one of the plurality of first regions,
wherein each of the plurality of first regions comprises an upper portion having a first doping concentration and a lower portion having a second doping concentration that is lower than the first doping concentration, and
wherein the lower portion of each of the plurality of first regions is quasi-charge balanced with a respective adjacent one of the plurality of second regions to form a superjunction structure in the drift region,
wherein the first sidewall of each of the plurality of first regions is slanted at an angle that is +/−1.5° of one of the <11-23>, <−1-123>, <1-213>, <−12-13>, <2-1-13> and <−2113> crystallographic axes.