IP Library Granted Patent US 11,615,003
Granted Patent B2
US 11,615,003 · App. 17/392,111 · Granted Mar 28, 2023

Optimized neural network data organization

Inventors: Chao Sun (San Jose, CA); Yan Li (Milpitas, CA); Dejan Vucinic (San Jose, CA)
Assignee: Western Digital Technologies, Inc.
G06F11/1476G06N3/08G06F2201/805
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,615,003
App. No.
17/392,111
Granted
Mar 28, 2023
Kind
B2
Abstract

In some implementations, the present disclosure relates to a method. The method includes obtaining a set of weights for a neural network comprising a plurality of nodes and a plurality of connections between the plurality of nodes. The method also includes identifying a first subset of weights and a second subset of weights based on the set of weights. The first subset of weights comprises weights that used by the neural network. The second subset of weights comprises weights that are prunable. The method further includes storing the first subset of weights in a first portion of a memory. A first error correction code is used for the first portion of the memory. The method further includes storing the second subset of weights in a second portion of the memory. A second error correction code is used for the second portion of the memory. The second error correction code is weaker than the first error correction code.

Claims (32)

1. A data storage device, comprising:

a memory comprising a plurality of dies; and

a controller coupled to the memory, the controller configured to:

organize data for a neural network across different portions of the memory; and

store weight data wherein the weight data comprises a first and second subset of weights for use by the neural network, wherein:

the first subset of weights is stored in a first portion of the memory, the first portion being configured to utilize a first error correction code;

the second subset of weights is stored in a second portion of the memory, the second portion being configured to utilize a second error correction code configured to be different than the first error correction code, and wherein the second subset of weights comprises prunable weights, that are pruned until a predetermined threshold associated with an accuracy of the neural network is exceeded.

2. The device of claim 1 , wherein the data is organized into two or more hierarchies across the different portions of the memory.

3. The device of claim 2 , wherein the first subset of weights stored in the first portion of the memory is associated with one of the two or more hierarchies.

4. The device of claim 3 , wherein the second subset of weights stored in the second portion of the memory is associated with another of the two or more hierarchies.

5. The device of claim 4 , wherein the weight data is stored across the plurality of dies.

6. The device of claim 1 , wherein the second error correction code is configured to be weaker than the first error correction code.

7. The device of claim 1 , wherein the weights within the weight data are ranked based on a plurality of evaluation metrics.

8. The device of claim 7 , wherein at least one of the plurality of evaluation metrics ranks the weights based on their effect on the accuracy of inferences or results generated by the neural network.

9. The device of claim 8 , wherein weights below a predetermined ranking are selected for pruning.

10. A method, comprising:

organizing data for a neural network into two or more hierarchies across different portions of a memory comprising a plurality of dies; and

storing and duplicating weight data across the plurality of dies wherein the weight data comprises a first and second subset of weights for use by the neural network, wherein:

the first subset comprises unprunable weights and is stored in a first portion of the memory configured to utilize a first error correction code; and

the second subset comprises prunable weights and is stored in a second portion of the memory configured to utilize a second error correction code that is different than the first error correction code.

11. The method of claim 10 , wherein the data is organized into two or more hierarchies across the different portions of the memory.

12. The device of claim 11 , wherein the weight data is further duplicated across the plurality of dies.

13. The device of claim 12 , wherein the second error correction code is configured to be weaker than the first error correction code.

14. The method of claim 10 , wherein the first and second subset of weights are stored in different types of memory.

15. The method of claim 14 , wherein the selection of the different type of memory to store the first and second subset of weights is based on the utilization of the weight data.

16. The method of claim 15 , wherein weight data that is accessed more often is stored within a memory type that has a lower latency compared to the other types of memory.

17. The method of claim 16 , wherein the weight data stored within a lower latency memory type is configured with a weaker error correction code.

18. A non-transitory machine-readable medium having executable instructions to cause one or more processing devices to perform operations comprising:

organizing data for a neural network across different portions of a memory comprising a plurality of memory structures; and

storing weight data across the plurality of memory structures wherein the weight data comprises a first and second subset of weights for use by the neural network, wherein:

the first subset comprises unprunable weights and is stored in a first portion of the memory configured to utilize a first error correction code, and

the second subset comprises prunable weights and is stored in a second portion of the memory configured to utilize a second error correction code that is different than the first error correction code, that are pruned until a predetermined threshold associated with an accuracy of the neural network is exceeded.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 058426 FRAME 0815 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0679 →
SECURITY INTEREST Recorded Dec 9, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 058426/0815 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2021
From: SUN, CHAO; LI, YAN; VUCINIC, DEJAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 057058/0799 →
Cited By (1)
US 12,579,030