Semiconductor structure, electrode structure and method of forming the same

1. A method for manufacturing a semiconductor structure, comprising:

depositing a dielectric layer over a top surface of a first metal layer;

forming a bottom electrode via (BEVA) hole having a tapered structure in the dielectric layer;

depositing a diffusion barrier layer over the dielectric layer and into the BEVA hole;

applying a flowable film over the diffusion barrier layer;

removing a portion of the flowable film to expose the diffusion barrier layer;

selectively etching away a portion of the diffusion barrier layer until a top surface of the diffusion barrier layer is lower than a top surface of the dielectric layer;

removing the remaining flowable film;

forming a bottom electrode over the diffusion barrier layer;

forming a magnetic tunneling junction (MTJ) structure over the bottom electrode;

forming a top electrode over the MTJ structure; and

forming a second metal layer over the top electrode.

2. The method of claim 1 , wherein the deposition of the dielectric layer over the top surface of the first metal layer comprises:

depositing a first silicon carbide (SiC) layer;

depositing a tetraethyl orthosilicate (TEOS) layer or a silicon-rich oxide (SRO) layer over the SiC layer; and

depositing a second SiC layer over the TEOS or the SRO layer.

3. The method of claim 1 , wherein a cross sectional view of the BEVA hole includes an upper portion with a trapezoidal shape and a lower portion with a rectangular shape.

4. The method of claim 1 , wherein the formation of the BEVA hole comprises:

performing dry etch upon the dielectric layer.

5. The method of claim 4 , wherein the performing the dry etch upon the dielectric layer comprises:

performing reactive ion etch (RIE) adopting fluorine-containing gases upon the dielectric layer.

6. The method of claim 1 , wherein the deposition of the diffusion barrier layer over the dielectric layer and into the BEVA hole comprises:

depositing a diffusion barrier layer having a thickness of about half of the depth of the BEVA hole.

7. The method of claim 1 , wherein the deposition of the diffusion barrier layer over the dielectric layer and into the BEVA hole comprises:

blanket depositing a metal nitride material over the dielectric layer and into the BEVA hole, wherein the metal nitride material does not fill up the BEVA hole, so that a top surface of the metal nitride material directly over the center of the BEVA hole is lower than a top surface of the dielectric layer.

8. The method of claim 7 , wherein the metal nitride materials includes tantalum nitride (TaN).

9. A method for manufacturing a semiconductor structure, comprising:

forming a dielectric layer over a top surface of a first metal layer;

forming a bottom electrode via (BEVA) hole in the dielectric layer;

depositing a diffusion barrier layer over the dielectric layer and into the BEVA hole;

applying a flowable film over the diffusion barrier layer;

performing an anneal process upon the flowable film;

removing a portion of the flowable film to expose a portion of the diffusion barrier layer;

selectively etching away a portion of the diffusion barrier layer until a top surface of the diffusion barrier layer is lower than a top surface of the dielectric layer;

blanket depositing a first electrode material over the diffusion barrier layer and the dielectric layer;

planarizing the first electrode material to level with a top surface of the dielectric layer;

blanket depositing a second electrode material once more over the planarized first electrode material and the dielectric layer;

thinning the second electrode material;

forming a magnetic tunneling junction (MTJ) structure over the second electrode material;

forming a top electrode over the MTJ structure; and

forming a second metal layer over the top electrode.

10. The method of claim 9 , wherein applying the flowable film over the diffusion barrier layer comprises:

applying the flowable film over the diffusion barrier layer through a spin coating method, a microscopic spraying method, or a rotation roller method.

11. The method of claim 9 , wherein applying the flowable film over the diffusion barrier layer comprises:

applying the flowable film to cover the diffusion barrier layer and to fill up a recess over the BEVA hole.

12. The method of claim 9 , wherein the flowable film includes a bottom antireflection coating (BARC).

13. The method of claim 9 , wherein the removing the portion of the flowable film to expose the portion of the diffusion barrier layer comprises:

not removing the flowable film in the recess over the BEVA hole.

14. The method of claim 9 , wherein the selectively etching away the portion of the diffusion barrier layer comprises:

etching the diffusion barrier layer at a faster rate than etching the flowable film.

15. The method of claim 9 , wherein the first electrode material includes TiN.

16. The method of claim 9 , wherein planarizing the first electrode material comprises:

performing a chemical mechanical polishing (CMP) upon the first electrode material until the dielectric layer is exposed.

17. The method of claim 16 , wherein the dielectric layer from bottom to top includes a first SiC layer, a TEOS layer or an SRO layer, and a second SiC layer, and the second SiC layer is removed through the CMP.

18. A method for manufacturing a semiconductor structure, comprising:

depositing a dielectric layer over a top surface of a first metal layer;

forming a bottom electrode via (BEVA) hole having a tapered structure in the dielectric layer;

depositing a diffusion barrier layer over the dielectric layer and into the BEVA hole;

applying a flowable film over the diffusion barrier layer;

removing a portion of the flowable film to expose the diffusion barrier layer and without removing the flowable film in a recess over the BEVA hole;

performing a selective etch upon the diffusion barrier layer;

removing the remaining flowable film;

forming a bottom electrode over the diffusion barrier layer;

forming a magnetic tunneling junction (MTJ) structure over the bottom electrode;

forming a top electrode over the MTJ structure; and

forming a second metal layer over the top electrode.

19. The method of claim 18 , wherein the deposition of the dielectric layer over the top surface of the first metal layer comprises:

depositing a first silicon carbide (SiC) layer;

depositing a tetraethyl orthosilicate (TEOS) layer or a silicon-rich oxide (SRO) layer over the SiC layer; and

depositing a second SiC layer over the TEOS or the SRO layer.

20. The method of claim 18 , wherein a cross sectional view of the BEVA hole includes an upper portion with a trapezoidal shape and a lower portion with a rectangular shape.