Granted Patent B2

US 12,211,889 · App. 17/401,489 · Granted Jan 28, 2025

Inventors: Weiping Bai (Hefei, CN); Mengkang Yu (Hefei, CN); Xingsong Su (Hefei, CN); Zhen Zhou (Hefei, CN)

Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.

H01L28/75

Abstract

Claims (53)

1. A method for electrode layer manufacture, comprising:

forming a first electrode layer, the first electrode layer comprising a doped Titanium Nitride (TiN) layer; and

forming a second electrode layer, the second electrode layer comprising a work function layer;

wherein the second electrode layer is disposed on a surface of the first electrode layer;

wherein the first electrode layer comprises a plurality of sub doped TiN layers superposed in sequence;

wherein the electrode layer is a laminated structure; the electrode layer comprises a plurality of first electrode layers and a plurality of second electrode layers; and the plurality of first electrode layers and the plurality of second electrode layers in the electrode layer are superposed alternately;

wherein after forming the second electrode layer, the method further comprises:

forming a laminated structure comprising a plurality of first electrode layers and a plurality of second electrode layers by reperforming steps of forming the first electrode layer and forming the second electrode layer on the surface of the first electrode layer for at least one time; and

wherein the plurality of first electrode layers and the plurality of second electrode layers in the laminated structure are laminated alternately;

wherein the work function layer comprises a ruthenium layer or a ruthenium oxide layer; forming the second electrode layer comprises: forming the second electrode layer by adopting an atomic layer deposition process; a process of forming the second electrode layer by adopting the atomic layer deposition process comprises at least one work function growth period; and the at least one work function growth period comprises:

forming a ruthenium precursor layer by providing a ruthenium precursor for the surface of the first electrode layer; and

forming a sub work function layer by providing a second reaction gas for a surface of the ruthenium precursor layer.

2. The method for electrode layer manufacture of claim 1 , wherein forming the first electrode layer comprises: forming the first electrode layer by adopting an atomic layer deposition process; a process of forming the first electrode layer by adopting the atomic layer deposition process comprises at least one doped TiN growth period; and the at least one doped TiN growth period comprises:

forming a titanium precursor layer by providing a titanium precursor;

absorbing a dopant on a surface of the titanium precursor layer by providing a dopant precursor for the surface of the titanium precursor layer; and

forming a sub doped TiN layer by providing a first reaction gas for the surface of the titanium precursor layer absorbed with the dopant.

3. The method for electrode layer manufacture of claim 2 , wherein the at least one doped TiN growth period comprises a plurality of doped TiN growth periods; at least one of before a first doped TiN growth period of the plurality of doped TiN growth periods, before a last doped TiN growth period of the plurality of doped TiN growth periods, or during at least two adjacent doped TiN growth periods of the plurality of doped TIN growth periods, the method further comprises: forming at least one TiN layer by adopting the atomic layer deposition process; and forming a first TiN layer of the at least one TiN layer by adopting the atomic deposition process comprises:

forming the titanium precursor layer on a surface of the sub doped TiN layer by providing the titanium precursor for the surface of the sub doped TiN layer; and

forming the first TiN layer by providing the first reaction gas for the surface of the titanium precursor layer.

4. The method for electrode layer manufacture of claim 1 , wherein a dopant in the doped TiN layer comprises at least one of: silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic or tungsten.

5. A method for manufacturing a capacitor, comprising:

forming a lower electrode layer on a side wall and a bottom of a capacitive hole, the lower electrode layer being manufactured by adopting the method for electrode layer manufacture of claim 1 ;

forming a capacitive dielectric layer on an inside surface and an outside surface of the lower electrode layer; and

forming an upper electrode layer on a surface of the capacitive dielectric layer.

6. The method for manufacturing a capacitor of claim 5 , wherein forming the first electrode layer comprises: forming the first electrode layer by adopting an atomic layer deposition process; a process of forming the first electrode layer by adopting the atomic layer deposition process comprises at least one doped TiN growth period; and the at least one doped TiN growth period comprises:

forming a titanium precursor layer by providing a titanium precursor;

absorbing a dopant on a surface of the titanium precursor layer by providing a dopant precursor for the surface of the titanium precursor layer; and

forming a sub doped TiN layer by providing a first reaction gas for the surface of the titanium precursor layer absorbed with the dopant.

7. A method for manufacturing a capacitor, comprising:

forming a lower electrode layer in a capacitive hole, the lower electrode layer fully filling in the capacitive hole and being manufactured by adopting the method for electrode layer manufacture of claim 1 ;

forming a capacitive dielectric layer on an outside surface of the lower electrode layer; and

forming an upper electrode layer on an outside surface of the capacitive dielectric layer.

8. An electrode layer, comprising:

a first electrode layer comprising a doped Titanium Nitride (TiN) layer; and

a second electrode layer comprising a work function layer;

wherein the second electrode layer is disposed on a surface of the first electrode layer;

wherein the first electrode layer comprises a plurality of sub doped TiN layers superposed in sequence;

wherein

the electrode layer is a laminated structure;

the electrode layer comprises a plurality of first electrode layers and a plurality of second electrode layers; and

the plurality of first electrode layers and the plurality of second electrode layers in the electrode layer are superposed alternately;

wherein the work function layer comprises a ruthenium layer or a ruthenium oxide layer.

9. The electrode layer of claim 8 , wherein a first TiN layer is disposed at least one of below a sub doped TiN layer of the plurality of sub doped TiN layers in a bottom layer, below a sub doped TiN layer of the plurality of sub doped TiN layers in a top layer, or between at least two adjacent sub doped TiN layers of the plurality of sub doped TiN layers.

10. The electrode layer of claim 8 , wherein the second electrode layer comprises a plurality of work function layers superposed in sequence.

11. The electrode layer of claim 8 , wherein a dopant in the doped TiN layer comprises at least one of: silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic or tungsten.

12. A capacitor, comprising:

a lower electrode layer comprising the electrode layer of claim 8 ;

a capacitive dielectric layer located on an inside surface and an outside surface of the lower electrode layer; and

an upper electrode layer located on a surface of the capacitive dielectric layer.

13. A capacitor, comprising:

a lower electrode layer comprising a solid columnar structure and comprising the electrode layer of claim 8 ;

a capacitive dielectric layer located on an outside surface of the lower electrode layer; and

an upper electrode layer located on an outside surface of the capacitive dielectric layer.

Assignments (1)

Priority Claims (1)

Continuity (2)

References Cited (28)