MIS capacitor and method of formation
An MIS capacitor with low leakage and high capacitance is disclosed. A layer of hemispherical grained polysilicon (HSG) is formed as a lower electrode. Prior to the dielectric formation, the hemispherical grained polysilicon layer may be optionally subjected to a nitridization or anneal process. A dielectric layer of aluminum oxide (Al 2 O 3 ), or a composite stack of interleaved layers of aluminum oxide and other metal oxide dielectric materials, is fabricated over the hemispherical grained polysilicon layer and after the optional nitridization or anneal process. The dielectric layer of aluminum oxide (Al 2 O 3 ) or the aluminum oxide composite stack may be optionally subjected to a post-deposition treatment to further increase the capacitance and decrease the leakage current. A metal nitride upper electrode is formed over the dielectric layer or the composite stack by a deposition technique or by atomic layer deposition.
1. An MIS capacitor comprising:
a lower electrode formed over a semiconductor substrate;
a dielectric layer comprising aluminum oxide formed over said lower electrode;
a metal nitride upper electrode formed over said dielectric layer; and
a metal-doped layer at the interface between said dielectric layer and said metal nitride upper electrode.
2. The MIS capacitor of claim 1 , wherein said metal-doped layer has a thickness of about 5 Angstroms to about 100 Angstroms.
3. The MIS capacitor of claim 1 , wherein said metal-doped layer is an aluminum-titanium-oxygen-nitrogen layer.
4. The MIS capacitor of claim 1 , wherein said metal-doped layer comprises a metal similar to the metal of said metal nitride upper electrode.