IP Library Granted Patent US 12,154,789
Granted Patent B2
US 12,154,789 · App. 17/414,041 · Granted Nov 26, 2024

Etching method using halogen fluoride and method for producing semiconductor

Inventor: Atsushi Suzuki (Tokyo, JP)
Assignee: Resonac Corporation
H01L21/3065H01L21/31116H01L21/31144
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Quick Facts
Patent No.
US 12,154,789
App. No.
17/414,041
Granted
Nov 26, 2024
Kind
B2
Abstract

A method for precise plasma etching of micropatterns on a silicon substrate containing silicon or additionally having a silicon oxide film. An etching method for plasma-etching a silicon substrate having silicon or a silicon oxide film using a halogen fluoride having a nitrogen (N 2 ) content of 1 vol % or less as an etching gas. Also disclosed is a method for producing a semiconductor using the etching method.

Claims (9)

1. An etching method for plasma-etching a silicon substrate containing silicon or in addition having a silicon oxide film which comprises contacting the substrate with a plasma of an etching gas consisting of a halogen fluoride having a nitrogen (N 2 ) content of 0.0005 to 1 vol % as an etching gas and an inert diluent gas in an amount of 90 vol % or less so as to anisotropically etch the silicon or silicon oxide film in a decompressed state.

2. The etching method according to claim 1 , wherein a halogen fluoride is at least one selected from ClF 3 , BrF 5 , IF 3 , IF 7 , ClF, BrF 3 , IF 5 and BrF.

3. The etching method according to claim 1 , wherein the diluent gas selected from Ar, Ne, Kr and Xe.

4. The etching method according to claim 1 , comprising the steps of:

providing a mask in a silicon substrate having silicon or a silicon oxide film, transporting the substrate into a processing chamber and mounting the substrate on a mount table inside the processing chamber;

decompressing the inside of the processing chamber;

supplying the etching gas into the processing chamber; and

forming plasma inside the processing chamber to perform anisotropic etching based on an electric potential difference between the plasma and the mounted substrate.

5. A method for producing a semiconductor using the etching method according to claim 1 .

Assignments (3)
CHANGE OF ADDRESS Recorded Feb 9, 2024
From: RESONAC CORPORATION
To: RESONAC CORPORATION
Reel/Frame 066547/0677 →
CHANGE OF NAME Recorded Jun 23, 2023
From: SHOWA DENKO K.K.
To: RESONAC CORPORATION
Reel/Frame 064082/0513 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2021
From: SUZUKI, ATSUSHI
To: SHOWA DENKO K.K.
Reel/Frame 056547/0147 →
Priority Claims (1)
JP 2018-239515 · Dec 21, 2018 · national
Continuity (1)
Related Publication 20220051898A1 · Feb 17, 2022