IP Library › Granted Patent US 12,347,796
Granted Patent B2
US 12,347,796 · App. 17/448,734 · Granted Jul 1, 2025

Semiconductor dies and devices with a coil for inductive coupling

Inventors: Martin Ostermayr (Woerth, DE); Walther Lutz (Erding, DE); Joachim Assenmacher (Unterhaching, DE); Georg Seidemann (Landshut, DE)
Assignee: Intel corporation
H01L23/645H01L24/64H01L2924/19042
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Quick Facts
Patent No.
US 12,347,796
App. No.
17/448,734
Granted
Jul 1, 2025
Kind
B2
Abstract

A semiconductor die is disclosed, including circuitry comprising a transistor at a frontside of a semiconductor substrate, and a backside inductor at a backside of the semiconductor substrate. The backside inductor is electrically connected to the transistor of the circuitry.

Claims (24)

1. A semiconductor die, comprising:

circuitry comprising a transistor at a frontside of a semiconductor substrate;

a backside inductor at a backside of the semiconductor substrate; and

a conductive line at the frontside of the semiconductor substrate,

wherein the backside inductor is electrically connected to the conductive line and the conductive line is electrically connected to the transistor,

wherein the conductive line is a power line for providing power to the transistor and buried in the semiconductor substrate under the circuitry.

2. The semiconductor die of claim 1 , wherein a material of the backside inductor is 90% or more of at least one of copper or aluminum.

3. The semiconductor die of claim 1 , further comprising:

a through semiconductor via conductively connecting the backside inductor to the conductive line.

4. The semiconductor die of claim 1 , wherein the transistor is a fin field-effect transistor, a nanowire transistor, a ribbon transistor, or a gate all around transistor.

5. The semiconductor die of claim 1 , wherein the backside inductor is configured to be part of an oscillator circuit.

6. The semiconductor die of claim 1 , wherein the backside inductor is configured to be part of a filter circuit.

7. The semiconductor die of claim 1 , wherein the conductive line includes a conductive material of at least one of copper, aluminum, ruthenium, or tungsten.

8. The semiconductor die of claim 1 , wherein the backside inductor includes a plurality of windings each in a respective plane at the backside.

9. The semiconductor die of claim 8 , wherein each winding includes at least one turn.

10. The semiconductor die of claim 1 , wherein the conductive line is electrically connected to a source or drain of the transistor.

11. A method of forming a semiconductor die, comprising:

forming circuitry including a transistor at a frontside of a semiconductor substrate;

forming a backside inductor at a backside of the semiconductor substrate; and

forming a conductive line at the frontside of the semiconductor substrate,

wherein the backside inductor is electrically connected to the conductive line and the conductive line is electrically connected to the transistor,

wherein the conductive line is a power line for providing power to the transistor and buried in the semiconductor substrate under the circuitry.

12. The method of claim 11 , further comprising:

forming a through semiconductor via for conductively connecting the backside inductor to the conductive line.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2026
From: INTEL CORPORATION
To: INTEL FOUNDRY IP LLC
Reel/Frame 076063/0964 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2021
From: SEIDEMANN, GEORG; LUTZ, WALTHER; OSTERMAYR, MARTIN; ASSENMACHER, JOACHIM
To: INTEL CORPORATION
Reel/Frame 057588/0569 →
Continuity (1)
Related Publication 20230102133A1 · Mar 30, 2023
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