Read level tracking by random threshold movement with short feedback loop
A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to determine a read threshold on a wordline, adjust a read threshold voltage level associated with the read threshold, determine an adjusted read threshold at the adjusted read threshold voltage level, where the adjusted read threshold is different from the read threshold, compare the adjusted read threshold to the read threshold, and calibrate the read threshold based on the comparing. The controller is further configured to analyze a bit error rate (BER) difference based on the calibrating and/or a previous read threshold voltage level movement, choose a next target read threshold for next calibration, and read a second page at the next target read threshold.
1. A data storage device, comprising:
a memory device; and
a controller coupled to the memory device, the controller configured to:
determine a first read threshold for a first page;
adjust voltage level of the first read threshold;
determine an adjusted first read threshold at the adjusted voltage level of the first read threshold, wherein the adjusted first read threshold is different from the first read threshold;
compare the adjusted first read threshold to the first read threshold, wherein comparing the adjusted first read threshold to the first read threshold comprises:
determining a bit error rate (BER) of the first page at the first read threshold;
determining an adjusted BER of a second page at the adjusted first read threshold, wherein the second pane is adjacent to the first page; and
determining that the adjusted BER of the second page is greater than or equal to the BER of the first page; and
calibrate the first read threshold of the first page responsive to determining that the adjusted BER of the second page is greater than or equal to the BER of the first page.
2. The data storage device of claim 1 , wherein determining the first read threshold further comprises determining a bit error rate (BER) at the first read threshold, and wherein determining the adjusted first read threshold further comprises determining an adjusted BER at the adjusted first read threshold.
3. The data storage device of claim 2 , wherein the determined BER and the determined adjusted BER is for the first page of the memory device.
4. The data storage device of claim 3 , wherein the memory device is a TLC memory device, and wherein the first page is either a lower page, a middle page, or an upper page.
5. The data storage device of claim 3 , wherein the memory device is a QLC memory device, and wherein the first page is either a lower page, a middle page, a upper page, or a top page.
6. The data storage device of claim 2 , wherein comparing the adjusted first read threshold to the first read threshold comprises comparing the determined BER to the determined adjusted BER.
7. The data storage device of claim 6 , wherein calibrating the first read threshold further comprises increasing the voltage level of the first read threshold or decreasing the voltage level of the first read threshold.
8. The data storage device of claim 1 , wherein the controller is further configured to iteratively:
determine a second read threshold for a second page using the calibrated first read threshold;
adjust voltage level of the second read threshold;
determine the adjusted second read threshold at the adjusted voltage level of the second read threshold, wherein the adjusted second read threshold is different from the second read threshold;
compare the adjusted second read threshold to the second read threshold; and
calibrate the second read threshold based on the comparing.
9. The data storage device of claim 8 , wherein the adjusted second read threshold is different from the second read threshold.
10. The data storage device of claim 1 , wherein the adjusting is by a digital to analog converter (DAC) shift level, and wherein the DAC shift level is 12.5 mV.
11. A data storage device, comprising:
a memory device; and
a controller coupled to the memory device, the controller configured to:
read a first page at a target read threshold;
determine a bit error rate (BER) of the first page at the target read threshold;
calibrate the target read threshold, wherein the calibrated target read threshold is different from the target read threshold;
read a second page at the calibrated target read threshold, wherein the second page is adjacent to the first page;
determine a BER of the second page at the calibrated read threshold; and
shift the target read threshold of the first page responsive to determining that the BER of the of the second page is equal to or greater than the BER of the first page.
12. The data storage device of claim 11 , wherein the target read threshold is a read threshold for a page adjacent to the first page, wherein the read threshold is a previously calibrated read threshold.
13. The data storage device of claim 11 , wherein the target read threshold is a threshold associated with a time and temperature (TRT) read threshold for the first page.
14. The data storage device of claim 11 , wherein the controller is further configured to shift the calibrated target read threshold by a voltage shift two times in a positive voltage direction when the BER of the second page is determined to be greater than the BER of the first page.
15. The data storage device of claim 14 , wherein the controller is further configured to reset the first BER of the first page to equal the second BER of the second page.
16. The data storage device of claim 11 , wherein the controller is further configured to reset the BER of the first page to equal the second BER of the second page when the BER of the second page is determined to be equal to or less than the BER of the first page.
17. The data storage device of claim 11 , wherein the target read threshold and the calibrated target read threshold are different.
18. A data storage device, comprising:
memory means; and
a controller coupled to the memory means, the controller configured to:
sense a first page at a first read threshold voltage and determine a first failed bit count (FBC) of the first page at the first read threshold voltage;
determine an adjusted first read threshold voltage by decreasing the first read threshold voltage by a voltage shift, wherein the adjusted first read threshold voltage is different from the first read threshold voltage;
sense the second page at the decreased first read threshold voltage and determine a second FBC of the second page at the adjusted first read threshold voltage, wherein the second pane is adjacent to the first page; and
shift the first read threshold voltage of the first page responsive to determining that the second FBC of the second page is equal to or greater than the first FBC of the first page.
19. The data storage device of claim 18 , wherein the controller is further configured to either:
option 1:
reset the first FBC equal to the second FBC when the second FBC is determined to be less than the first FBC;
decrease a read threshold voltage of a second state of the second page by the voltage shift; and
re-compare the second FBC to the first FBC, wherein the second FBC corresponds to a FBC of the second page at the decreased read threshold voltage of the second state; or
option 2:
increase the decreased read threshold voltage of the first state of the second page by the voltage shift;
decrease the read threshold voltage of the second state of the second page by the voltage shift; and
re-compare the second FBC to the first FBC, wherein the second FBC corresponds to a FBC of the second page at the decreased read threshold voltage of the second state.