Selective HMB backup in NVM for low power mode
A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to store XOR parity data in a host memory buffer (HMB) of a host device, monitor a health of the memory device, determine that a threshold corresponding to the health of one or more blocks of the memory device has been reached or exceeded, and copy the XOR parity data from the HMB to the memory device. The controller is further configured to receive a low power mode indication from the host device and enter the low power mode after copying the XOR parity data from the HMB to the memory device. The controller is further configured to correct read failures using the XOR parity data retrieved from the HMB.
1. A data storage device, comprising:
a memory device; and
a controller coupled to the memory device, the controller configured to:
store XOR parity data in a host memory buffer (HMB) of a host device;
monitor health of the memory device;
determine that a threshold corresponding to the health of one or more blocks of the memory device has been reached or exceeded; and
copy the XOR parity data from the HMB to the memory device.
2. The data storage device of claim 1 , wherein the monitoring the health of the memory device comprises monitoring a bit error rate (BER) of one or more open blocks of the memory device.
3. The data storage device of claim 2 , wherein the monitoring the BER comprises monitoring an amount of time that a block is open.
4. The data storage device of claim 1 , wherein the monitoring the health of the memory device comprises monitoring a number of program erase cycles (PECs) of one or more open blocks of the memory device.
5. The data storage device of claim 1 , wherein the monitoring the health of the memory device comprises monitoring a temperature variation of one or more open blocks of the memory device.
6. The data storage device of claim 1 , wherein the monitoring the health of the memory device comprises monitoring an abnormality of one or more open blocks relative to a majority of open blocks of the memory device.
7. The data storage device of claim 1 , wherein the controller is further configured to receive an indication from the host device to enter a low power mode.
8. The data storage device of claim 7 , wherein background operations are executed during the low power mode.
9. The data storage device of claim 7 , wherein the copying the XOR parity data from the HMB to the memory device occurs when the threshold corresponding to the health of one or more blocks of the memory device has been reached or exceeded and after receiving the indication from the host device to enter the low power mode.
10. The data storage device of claim 1 , wherein the controller is configured to utilize the XOR parity data copied to the memory device upon determining that a read failure has occurred.
11. A data storage device, comprising:
a memory device; and
a controller coupled to the memory device, the controller configured to:
store XOR parity data in a host memory buffer (HMB) of a host device;
monitoring at least one of a bit error rate (BER) of one or more open blocks of the memory device, a number of program erase cycles (PECs) of the one or more open blocks of the memory device, a temperature variation of the one or more open blocks of the memory device, and an abnormality of one or more open blocks relative to a majority of open blocks of the memory device;
determine that a threshold corresponding to the monitoring has been reached or exceeded; and
copy the XOR parity data from the HMB to the memory device.
12. The data storage device of claim 11 , wherein the controller is further configured to receive a command to enter a low power mode.
13. The data storage device of claim 12 , wherein the controller is further configured to, upon receiving the command to enter the low power mode, execute the copying.
14. The data storage device of claim 11 , wherein the controller is further configured to determine that a link between a host device and the memory device has been deactivated.
15. The data storage device of claim 14 , wherein the controller is configured to correct data of the one or more open blocks corresponding to the monitoring with the copied XOR parity data.
16. The data storage device of claim 11 , wherein the threshold is dynamic.
17. A data storage device, comprising:
memory means; and
a controller coupled to the memory means, the controller configured to:
determine that one or more blocks has exceeded a temperature threshold or has an abnormality with one or more blocks as compared to a majority of other blocks of the one or more blocks;
retrieve XOR parity data from the memory means;
perform a read operation to read first data from the one or more blocks or an adjacent block to the one or more blocks;
perform error correction on first data with the XOR parity data retrieved from the memory means;
determine that the one or more blocks that either exceeded the temperature threshold or had an abnormality no longer exceeds the temperature threshold or no longer has an abnormality;
retrieve XOR parity data from a host memory buffer (HMB);
perform a read operation to read second data from the one or more blocks or an adjacent block to the one or more blocks; and
perform error correction on the second data with the XOR parity data retrieved from HMB.
18. The data storage device of claim 17 , wherein the controller is further configured to update the XOR parity data stored in the HMB upon determining that the one or more blocks that either exceeded the temperature threshold or had an abnormality no longer exceeds the temperature threshold or no longer has an abnormality.
19. The data storage device of claim 17 , wherein the controller is further configured to determine that a link between a host device and the data storage device has been shut down.
20. The data storage device of claim 19 , wherein the controller is configured to, upon determining that the link has been shut down, trigger background operations.