Solid-state imaging device, manufacturing method thereof, and electronic apparatus
A solid-state imaging device having a backside illuminated structure, includes: a pixel region in which pixels each having a photoelectric conversion portion and a plurality of pixel transistors are arranged in a two-dimensional matrix; an element isolation region isolating the pixels which is provided in the pixel region and which includes a semiconductor layer provided in a trench by an epitaxial growth; and a light receiving surface at a rear surface side of a semiconductor substrate which is opposite to a multilayer wiring layer.
1. A light detecting device, comprising:
a semiconductor substrate including a first plane receiving incident light and a second plane opposite to the first plane;
a first photoelectric conversion region disposed in the semiconductor substrate;
a second photoelectric conversion region disposed in the semiconductor substrate adjacent to the first photoelectric conversion region in a cross-sectional view;
a first trench including a first void region disposed between the first and second photoelectric conversion regions in the cross-sectional view; and
a multi wiring layer disposed at a side of the second plane in the cross-sectional view, wherein a first film and a second film are disposed in the first trench in the cross-sectional view.
2. The light detecting device according to claim 1 , wherein the semiconductor substrate includes a p-type region, and wherein the p-type region is disposed between the first void region and the first photoelectric conversion region in the cross-sectional view.
3. The light detecting device according to claim 2 , wherein the first void region does not extend over the first plane of the semiconductor substrate.
4. The light detecting device according to claim 1 , further comprising:
a third photoelectric conversion region disposed adjacent to the second photoelectric conversion region in the cross-sectional view.
5. The light detecting device according to claim 4 , further comprising:
a second trench including a second void region disposed between the second and third photoelectric conversion regions in the cross-sectional view.
6. The light detecting device according to claim 4 , further comprising:
a fourth photoelectric conversion region disposed adjacent to the third photoelectric conversion region in the cross-sectional view.
7. The light detecting device according to claim 6 , wherein the first, the second, the third, and the fourth photoelectric conversion regions share a reset transistor, an amplification transistor, and a selection transistor.
8. The light detecting device according to claim 1 , further comprising:
a reset transistor; an amplification transistor; and a selection transistor.
9. The light detecting device according to claim 1 , wherein the first film comprises a p-type silicon film, and wherein the second film comprises a silicon oxide film.
10. The light detecting device according to claim 1 , wherein the semiconductor substrate includes a p-type region, and wherein the first and the second photoelectric conversion regions comprise an n-type region.
11. An electronic apparatus, comprising:
an optical system; and
a light detecting device, comprising:
a semiconductor substrate including a first plane receiving incident light and a second plane opposite to the first plane;
a first photoelectric conversion region disposed in the semiconductor substrate in a cross-sectional view;
a second photoelectric conversion region disposed in the semiconductor substrate adjacent to the first photoelectric conversion region in the cross-sectional view;
a first trench including a first void region disposed between the first and second photoelectric conversion regions in the cross-sectional view; and
a multi wiring layer disposed at a side of the second plane in the cross-sectional view, wherein a first film and a second film are disposed in the first trench in the cross-sectional view.
12. The electronic apparatus according to claim 11 , wherein the semiconductor substrate includes a p-type region, and wherein the p-type region is disposed between the first void region and the first photoelectric conversion region in the cross-sectional view.
13. The electronic apparatus according to claim 12 , wherein the first void region does not extend over the first plane of the semiconductor substrate.
14. The electronic apparatus according to claim 11 , further comprising:
a third photoelectric conversion region disposed adjacent to the second photoelectric conversion region in the cross-sectional view.
15. The electronic apparatus according to claim 14 , further comprising:
a second trench including a second void region disposed between the second and third photoelectric conversion regions in the cross-sectional view.
16. The electronic apparatus according to claim 14 , further comprising:
a fourth photoelectric conversion region disposed adjacent to the third photoelectric conversion region in the cross-sectional view.
17. The electronic apparatus according to claim 16 , wherein the first, the second, the third, and the fourth photoelectric conversion regions share a reset transistor, an amplification transistor, and a selection transistor.
18. The electronic apparatus according to claim 11 , further comprising:
a reset transistor; an amplification transistor; and a selection transistor.
19. The electronic apparatus according to claim 11 , wherein the first film comprises a p-type silicon film, and wherein the second film comprises a silicon oxide film.
20. The electronic apparatus according to claim 11 , wherein the semiconductor substrate includes a p-type region, and wherein the first and the second photoelectric conversion regions comprise an n-type region.