IP Library Granted Patent US 11,599,298
Granted Patent B1
US 11,599,298 · App. 17/482,690 · Granted Mar 7, 2023

Storage system and method for prediction-based pre-erase of blocks to improve sequential performance

Inventors: Sabith Ali B N (Karnataka, IN); Lakshmi Sowjanya Sunkavelli (Bangalore, IN); Silky Mohanty (Bengaluru, IN); Noor Mohamed A A (Kumbakonam, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/0652G06F3/064G06F3/0611G06F3/0656G06F3/0659G06F3/0679
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Quick Facts
Patent No.
US 11,599,298
App. No.
17/482,690
Granted
Mar 7, 2023
Kind
B1
Abstract

A storage system erases blocks of memory prior to writing data to the blocks. Instead of erasing the blocks at the time the write operations are executed, the storage system pre-erases the blocks, which can improve performance. However, because program failure errors can occur if the blocks sit empty for a relatively-long period of time prior to programming, the storage system pre-erases the blocks upon a prediction that a host will send sequential write commands to the storage system that will use the blocks. Additionally or alternatively, the storage system can pre-erase a block upon determining that the number of write commands in a command queue in the storage system is above a threshold that represents a number of write commands needed to fill the block with data.

Claims (42)

1. A storage system comprising:

a memory; and

a controller configured to:

perform garbage collection on a plurality of blocks in the memory;

predict that a host will send sequential write commands to the storage system;

prior to receiving the sequential write commands from the host, pre-erase the plurality of blocks in the memory, wherein pre-erasing the plurality of blocks comprises performing erase operations on the plurality of blocks that would otherwise be performed as part of write operations of the plurality of blocks;

receive the sequential write commands from the host; and

use the pre-erased plurality of blocks to store data written by the sequential write commands.

2. The storage system of claim 1 , wherein the controller is further configured to store the data written by the sequential write commands as a foreground operation, and wherein because the plurality of blocks are pre-erased, the controller is further configured to avoid performing an erase operation on the plurality of blocks during the foreground operation.

3. The storage system of claim 1 , wherein the controller is further configured to use a machine-learning model to predict that the host will send the sequential write commands to the storage system.

4. The storage system of claim 3 , wherein inputs to the machine-learning model comprise at least one of the following items: a logical block address, a length of logical block addresses, a timestamp, a frequency of host writes, and a frequency of host reads.

5. The storage system of claim 1 , wherein the controller is further configured to pre-erase the plurality of blocks during idle time.

6. The storage system of claim 1 , wherein the controller is further configured to store addresses of the pre-erased plurality of blocks in a first-in-first-out (FIFO) buffer.

7. The storage system of claim 6 , wherein the controller is further configured to remove an address of a block from the FIFO buffer in response to determining that the block has been in the buffer more than a threshold amount of time.

8. The storage system of claim 1 , wherein the controller is further configured to:

determine that a number of write commands in a command queue in the storage system is above a threshold; and

in response to determining that the number of write commands in the command queue is above the threshold, pre-erase another block in the memory.

9. The storage system of claim 8 , further comprising:

a front-end module comprising the command queue; and

a back-end module configured to execute the write commands.

10. The storage system of claim 8 , wherein the controller is further configured to pre-erase the another block using a segmented erase process.

11. The storage system of claim 1 , wherein the memory comprises a three-dimensional memory.

12. In a storage system comprising a memory, a method comprising:

performing garbage collection on a block in the memory;

determining that a number of write commands in a command queue in the storage system is above a threshold;

in response to determining that the number of write commands in the command queue is above the threshold, pre-erasing the block in the memory, wherein pre-erasing the block comprises performing an erase operation on the block that would otherwise be performed as part of a write operation of the block; and

executing the write commands, wherein the pre-erased block is used to store data written by the write commands.

13. The method of claim 12 , wherein the storage system comprises a front-end module comprising the command queue and a back-end module configured to execute the write commands.

14. The method of claim 13 , wherein the block in the memory is pre-erased in phases when the front-end module is busy.

15. The method of claim 12 , wherein the threshold represents a number of write commands needed to fill the block with data.

16. The method of claim 12 , further comprising:

predicting that a host will send sequential write commands to the storage system; and

prior to receiving the sequential write commands from the host, pre-erasing a plurality of blocks in the memory that will be used to store data written by the sequential write commands.

17. The method of claim 16 , further comprising using a machine-learning model to predict that the host will send the sequential write commands to the storage system.

18. The method of claim 16 , further comprising pre-erasing the plurality of blocks during idle time.

19. The method of claim 16 , further comprising removing one of the plurality of pre-erased blocks from a pool of available blocks in response to determining that the one of the plurality of pre-erased blocks was pre-erased more than a threshold amount of time ago.

20. A storage system comprising:

a memory;

means for performing garbage collection on first and second blocks in the memory; and

one or both of the following:

means for passive pre-erasing of the first block in the memory based on a machine-learning prediction, wherein passive pre-erasing of the first block comprises performing an erase operation on the first block that would otherwise be performed as part of a write operation of the first block; and

means for active pre-erasing of the second block in the memory based on a command-queue-based prediction, wherein active pre-erasing of the second block comprises performing an erase operation on the second block that would otherwise be performed as part of a write operation of the second block.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 058426 FRAME 0815 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0679 →
SECURITY INTEREST Recorded Dec 9, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 058426/0815 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2021
From: B N, SABITH ALI; SUNKAVELLI, LAKSHMI SOWJANYA; MOHANTY, SILKY; A A, NOOR MOHAMED
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 057574/0419 →