IP Library Granted Patent US 11,789,654
Granted Patent B2
US 11,789,654 · App. 17/489,378 · Granted Oct 17, 2023

Data storage device and method for file-based interrupt coalescing

Inventors: Judah Gamliel Hahn (Ofra, IL); Shay Benisty (Beer Sheva, IL); Ariel Navon (Revava, IL)
Assignee: Western Digital Technologies, Inc.
G06F3/0659G06F3/061G06F3/0679G06F12/0223G06F2212/1008
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,789,654
App. No.
17/489,378
Granted
Oct 17, 2023
Kind
B2
Abstract

A data storage device and method for file-based interrupt coalescing are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to execute a plurality of read commands read from a submission queue in a host; write a plurality of completion messages to a completion queue in the host; and coalesce interrupts to inform the host that plurality of completion messages were written to the completion queue; wherein the submission queue and the completion queue are dedicated to read commands from a host application and are separate from a submission queue and a completion queue for read and write commands from an operating system of the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Claims (35)

1. A data storage device comprising: a memory; and a controller configured to: execute a plurality of read commands read from a submission queue in a host; write a plurality of completion messages to a completion queue in the host; and coalesce interrupts to inform the host that the plurality of completion messages was written to the completion queue; and send the coalesced interrupts to the host in response to reading a reverse list of logical block addresses that are considered part of a same extent that is not to trigger sending an interrupt; wherein the submission queue and the completion queue are dedicated to read commands from a host application and are separate from a submission queue and a completion queue for read and write commands from an operating system of the host.

2. The data storage device of claim 1 , wherein the plurality of predetermined logical block addresses is specified by the host.

3. The data storage device of claim 1 , wherein the plurality of predetermined logical block addresses is received from the host via a dataset management integral read command.

4. The data storage device of claim 1 , wherein the controller is further configured to identify the plurality of predetermined logical block addresses by creating an internal extent map.

5. The data storage device of claim 1 , wherein the plurality of predetermined logical block addresses is listed in a logical-to-physical address data structure.

6. The data storage device of claim 1 , wherein the controller is further configured to send the coalesced interrupts to the host in response to reading data that is smaller than a predetermined read size.

7. The data storage device of claim 1 , wherein the controller is further configured to:

avoid automatically sending an interrupt to inform the host that a completion message was written to the completion queue dedicated to the host application, and

send the coalesced interrupts to the host only after receiving a command from the host that triggers the sending of the coalesced interrupts.

8. The data storage device of claim 7 , wherein the controller is further configured to send the coalesced interrupts only after receiving the command from the host and after completing any previously-submitted read commands from the submission queue dedicated to the host application.

9. The data storage device of claim 7 , wherein the command from the host comprises a non-read command.

10. The data storage device of claim 7 , wherein the command from the host comprises a no-op command.

11. The data storage device of claim 7 , wherein the command from the host comprises a vendor-specific command.

12. The data storage device of claim 7 , wherein the command from the host comprises an illegal command.

13. The data storage device of claim 1 , wherein the controller is further configured to take into consideration an interrupt coalescing parameter set by the host when coalescing the interrupts.

14. The data storage device of claim 1 , wherein:

the controller is further configured to coalesce interrupts to inform the host that a plurality of completion messages was written to the completion queue for read and write commands from the operating system of the host; and

interrupts to inform the host that the plurality of completion messages was written to the completion queue dedicated to the host application are coalesced differently from interrupts to inform the host that the plurality of completion messages was written to the completion queue for read and write commands from the operating system of the host.

15. The data storage device of claim 1 , wherein the host application comprises a game application.

16. The data storage device of claim 1 , wherein the memory comprises a three-dimensionalmemory.

17. A method comprising:

performing the following in a data storage device in communication with a host comprising a submission queue and a completion queue:

executing a plurality of read commands from the submission queue, wherein the plurality of read commands is for parts of an asset of a game application on a host;

writing a plurality of completion messages to the completion queue; and

delaying sending interrupts to inform the host that the plurality of completion messages was written to the completion queue until a predetermined read event occurs, wherein the predetermined read event comprises reading all of the parts of the asset.

18. The method of claim 17 , wherein the predetermined read event comprises reading an end-of-file extent.

19. The method of claim 17 , wherein the submission queue and the completion queue are dedicated to read commands from an application running on a host and are separate from a submission queue and a completion queue for read and write commands from an operating system of the host.

20. A data storage device comprising:

a memory;

means for executing a plurality of read commands read from a submission queue in a host;

means for writing a plurality of completion messages to a completion queue in the host;

means for coalescing interrupts to inform the host that the plurality of completion messages was written to the completion queue;

means for avoiding automatically sending an interrupt to inform the host that a completion message was written to the completion queue dedicated to the host application; and

means for sending the coalesced interrupts to the host only after receiving a command from the host that triggers the sending of the coalesced interrupts;

wherein the submission queue and the completion queue are dedicated to read commands from a host application and are separate from a submission queue and a completion queue for read and write commands from an operating system of the host.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 058426 FRAME 0815 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0679 →
SECURITY INTEREST Recorded Dec 9, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 058426/0815 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2021
From: HAHN, JUDAH GAMLIEL; BENISTY, SHAY; NAVON, ARIEL
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 057645/0318 →