Method and apparatus for generating plasma with ion blocker plate
Methods of generating a plasma in a semiconductor processing chamber comprise: applying a radio frequency (RF) power to generate a plasma in a plasma region of the processing chamber, the processing chamber containing: a showerhead, an ion blocker plate, and a substrate, and the plasma region being defined by a front surface of the showerhead and a back surface of the ion blocker plate; and applying a bias the ion blocker plate so that there is no light-up in the processing chamber. Some methods further include dynamically tuning the bias by assessing conditions of light-up or no light-up and adjusting the bias. Some methods further include applying the bias zonally.
1 . A method of generating a plasma in a semiconductor processing chamber, the method comprising:
processing a substrate in the semiconductor processing chamber including a housing;
applying a radio frequency (RF) power from a power source to generate a plasma in a plasma region of the processing chamber, the processing chamber containing: a showerhead having a front surface and a back surface located below a plenum and a plurality of apertures in fluid communication with the plenum, an ion blocker plate, and the substrate, and the plasma region defined by the front surface of the showerhead and a back surface of the ion blocker plate; and
applying a bias to the ion blocker plate to mitigate light-up in the ion blocker plate.
2 . The method of claim 1 , wherein applying the bias is effective to electrically confine ions of the plasma in the plasma region and prevent light-up in the ion blocker plate.
3 . The method of claim 1 , the method further comprising dynamically tuning the bias during a deposition process by assessing conditions of light-up or no light-up and adjusting the bias.
4 . The method of claim 1 , wherein the power is connected to the ion blocker plate and grounded to the housing.
5 . The method of claim 1 , wherein applying the bias comprises delivering a direct current (DC) bias of the ion blocker plate in a range of ±50V to ±200V.
6 . The method of claim 1 , wherein applying the bias comprises delivering a low frequency radio frequency (LFRF) bias of the ion blocker plate in a range of greater than or equal to 2 W to less than or equal to 50 W at a frequency in a range of 100 kHz to 500 KHz.
7 . The method of claim 1 , wherein the plasma is generated during an atomic layer deposition (ALD) process operating at a power range of 400 W to 2500 W, and the method further comprises depositing a film on the substrate.
8 . The method of claim 1 , wherein the ion blocker plate comprises openings having a size in a range of greater than or equal to 20 mil (0.5 mm) to less than or equal to 0.5 inches (12.7 mm), and/or a thickness in a range of greater than or equal to 20 mil (0.5 mm) to less than or equal to 2 inches (50 mm).
9 . A method of generating a plasma in a semiconductor processing chamber including a housing, the method comprising:
applying a radio frequency (RF) power from a power source to a showerhead of the processing chamber to generate a plasma in a plasma region of the processing chamber, the processing chamber containing: the showerhead having a front surface and a back surface located below a plenum and a plurality of apertures in fluid communication with the plenum, an ion blocker plate, and the substrate, the plasma region being defined by the front surface of the showerhead and a back surface of the ion blocker plate;
applying a bias comprising direct current (DC) or low frequency radio frequency (LFRF) to the ion blocker plate; and
modulating the bias to mitigate light-up in the ion blocker plate.
10 . The method of claim 9 , wherein the modulating of the bias comprises dynamically tuning the bias during a deposition process by assessing conditions of light-up or no light-up and adjusting the bias.
11 . The method of claim 9 , wherein the power is connected to the ion blocker plate and grounded to the housing.
12 . The method of claim 9 , wherein applying the bias comprises delivering a direct current (DC) bias of the ion blocker plate in a range of ±50V to ±200V.
13 . The method of claim 9 , wherein applying the bias comprises delivering a low frequency radio frequency (LFRF) bias of the ion blocker plate in a range of greater than or equal to 2 W to less than or equal to 50 W at a frequency in a range of 100 kHz to 500 KHz.
14 . The method of claim 9 , wherein the plasma is generated during an atomic layer deposition (ALD) process operating at a power range of 400 W to 2500 W, and the method further comprises depositing a film on the substrate.
15 . The method of claim 9 , wherein the ion blocker plate comprises openings having a size in a range of greater than or equal to 20 mil (0.5 mm) to less than or equal to 0.5 inches (12.7 mm), and/or a thickness in a range of greater than or equal to 20 mil (0.5 mm) to less than or equal to 2 inches (50 mm).