Interleaved ECC coding for key-value data storage devices
Interleaved ECC coding for key-value data storage devices. In one embodiment, a controller includes a memory interface including a namespace database; an ECC engine; a controller memory; and an electronic processor. The electronic processor is configured to receive a host write command, determine whether write access was setup as a key-value (KV) namespace in the namespace database and is associated with the host write command, and control the ECC engine and the memory interface to perform one or more program operations on the data in the memory using the interleaved ECC coding and based on the host write command in response to determining that the write access was setup as the KV namespace in the namespace database and the KV namespace is associated with the host write command.
1. A data storage controller, comprising:
a memory interface configured to interface with a memory;
an error correction code (ECC) engine configured to perform an interleaved ECC coding on data stored in the memory;
a controller memory including a flash translation layer (FTL) and a namespace database; and
an electronic processor communicatively connected to the ECC engine and the controller memory, the electronic processor, when executing the FTL, is configured to:
receive a host write command,
determine whether write access was setup as a key-value (KV) namespace in the namespace database and is associated with the host write command, and
control the ECC engine and the memory interface to perform one or more program operations on the data in the memory using the interleaved ECC coding and based on the host write command in response to determining that the write access was setup as the KV namespace in the namespace database and the KV namespace is associated with the host write command.
2. The data storage controller of claim 1 , wherein the ECC engine is configured to perform a page-by-page ECC coding on the data in the memory, and
wherein the electronic processor, when executing the FTL, is further configured to:
control the ECC engine and the memory interface to perform a second one or more program operations on the data in the memory using the page-by-page ECC coding and based on the host write command in response to determining that the write access was not setup as the KV namespace in the namespace database.
3. The data storage controller of claim 1 , wherein the ECC engine is configured to:
perform an interleaved ECC decoding on the data in the memory, and
perform a page-by-page ECC decoding on the data in the memory, and
wherein the electronic processor, when executing the FTL, is further configured to:
receive a host read command,
determine whether read access was setup as the KV namespace in the namespace database and is associated with the host read command, and
control the ECC engine and the memory interface to perform one or more read operations on the data in the memory using the interleaved ECC decoding and based on the host read command in response to determining that the read access was setup as the KV namespace in the namespace database and is the KV namespace associated with the host read command.
4. The data storage controller of claim 3 , wherein the electronic processor, when executing the FTL, is further configured to:
control the ECC engine and the memory interface to perform a second one or more read operations on the data in the memory using the page-by-page ECC decoding and based on the host read command in response to determining that the read access was not setup as the KV namespace in the namespace database.
5. The data storage controller of claim 1 , wherein the electronic processor, when executing the FTL, is further configured to:
receive one or more namespaces from an external electronic device, the one or more namespaces including the KV namespace that is associated with the host write command, and
control the memory to store the one or more namespaces in the namespace database.
6. The data storage controller of claim 1 , wherein the host write command includes user data and a request, the request including one of a key-value, a write address, or a namespace identifier, and wherein the interleaved ECC coding is one of a vertical interleaved ECC coding or a checkerboard interleaved ECC coding.
7. The data storage controller of claim 6 , wherein the ECC engine is configured to perform a page-by-page ECC coding on the user data stored in the memory, and
wherein the electronic processor, when executing the FTL, is further configured to:
determine whether a size of the user data is greater than a threshold, and
control the ECC engine and the memory interface to perform a second one or more program operations on the user data using the page-by-page ECC decoding and based on the host write command in response to determining that the size of the user data is not greater than the threshold.
8. A method comprising:
receiving, with an electronic processor of a data storage controller, a host write command;
determining, with the electronic processor, whether write access was setup as a key-value (KV) namespace in a namespace database of a controller memory of the data storage controller and the KV namespace is associated with the host write command; and
controlling, with the electronic processor, an error correction code (ECC) engine and a memory interface of the data storage controller to perform one or more program operations on data in a memory coupled to the data storage controller using an interleaved ECC coding and based on the host write command in response to determining that the write access was setup as the KV namespace in the namespace database and the KV namespace is associated with the host write command.
9. The method of claim 8 , further comprising:
controlling the ECC engine and the memory interface to perform a second one or more program operations on the memory using a page-by-page ECC coding and based on the host write in response to determining that the write access was not setup as the KV namespace in the namespace database.
10. The method of claim 8 , further comprising:
receiving a host read;
determining whether read access was setup as the KV namespace in the namespace database and the KV namespace is associated with the host read; and
controlling the ECC engine and the memory interface to perform one or more read operations on the data in the memory using the interleaved ECC decoding and based on the host read in response to determining that the read access was setup as the KV namespace in the namespace database and the KV namespace is associated with the host read.
11. The method of claim 10 , further comprising:
controlling the ECC engine and the memory interface to perform a second one or more read operations on the memory using a page-by-page ECC decoding and based on the host read in response to determining that the read access was not setup as the KV namespace in the namespace database.
12. The method of claim 8 , further comprising:
receiving one or more namespaces from an external electronic device, the one or more namespaces including the KV namespace that is associated with the host write; and
controlling the memory to store the one or more namespaces in the namespace database.
13. The method of claim 8 , wherein the host write includes user data and a request, the request including one of a key-value or a write address, and wherein the interleaved ECC coding is one of a vertical interleaved ECC coding or a checkerboard interleaved ECC coding.
14. The method of claim 13 , further comprising:
determining whether a size of the user data is greater than a threshold; and
controlling the ECC engine and the memory interface to perform a second one or more program operations on the data in the memory using a page-by-page ECC decoding and based on the host write in response to determining that the size of the user data is not greater than the threshold,
wherein the second one or more program operations are performed instead of the one or more program operations.
15. A memory device that supports storing data in a key value namespace, the memory device comprising:
a controller; and
a memory coupled to the controller, wherein the controller performs a first ECC coding process that interleaves an ECC code-word with user data when writing the user data to a key-value (KV) database.
16. The memory device of claim 15 , wherein the controller performs a second ECC coding process that performs page-by-page ECC coding of the user data writing the ECC code-word and the user data page-by-page in the memory.
17. The memory device claim 16 , wherein the controller manages the first and second ECC coding processes using a Flash-Translation-Layer (FTL) and a namespace database.
18. The memory device of claim 17 , wherein the controller includes a controller memory for storing the FTL and the namespace database.
19. The memory device of claim 15 , wherein the memory comprises a plurality of NAND dies.
20. The memory device of claim 15 , wherein a host write command received by the controller from a host device includes the user data and a request, the request including one of a key-value or a write address, and wherein the first ECC coding process is one of a vertical interleaved ECC coding or a checkerboard interleaved ECC coding of the ECC code-word with the user data in the memory.