IP Library Granted Patent US 11,755,238
Granted Patent B2
US 11,755,238 · App. 17/492,175 · Granted Sep 12, 2023

Continuous NAND data-transfer using filling rate evaluation approach

Inventor: Shay Benisty (Beer Sheva, IL)
Assignee: Western Digital Technologies, Inc.
G06F3/0655G06F3/0604G06F3/0679
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Quick Facts
Patent No.
US 11,755,238
App. No.
17/492,175
Granted
Sep 12, 2023
Kind
B2
Abstract

A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to deliver a continuous DQS signal, determine whether a fill rate of a write buffer or an emptying rate of read buffer is sufficient to continuously send user data to the memory device or from the memory device, evaluate timing for sending or receiving the user data, and transfer data to or from the memory device continuously with the DQS signal. The data sent to the memory device includes the user data and garbage data, where the user data and the garbage data are separately transferred. The data received from the memory device includes user data that is sampled and user data that is not sampled, where the user data that is sampled and the user data that is not sampled are separately received.

Claims (65)

1. A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, wherein the controller is configured to:

deliver a continuous data strobe (DQS) signal;

determine whether a fill rate of a write buffer is sufficient to continuously send user data to the memory device;

evaluate timing for sending the user data to the memory device; and

transfer data to the memory device continuously with the DQS signal, wherein:

the data comprises the user data and garbage data;

the user data and the garbage data are separately transferred;

transferring the user data and the garbage data is based on the determining and the evaluating:

the garbage data is transferred when an amount of the user data stored in the write buffer is less than a predetermined threshold level;

the user data is transferred when the amount of the user data stored in the write buffer is greater than or equal to the predetermined threshold level; and

the predetermined threshold level is dependent on a toggle mode of the data storage device.

2. The data storage device of claim 1 , wherein the garbage data is transferred to the memory device when the write buffer is empty.

3. The data storage device of claim 1 , wherein the controller is further configured to determine if the fill rate and an amount of data stored in the write buffer is sufficient to continuously send the user data to the memory device.

4. The data storage device of claim 3 , wherein the controller is further configured to re-measure the fill rate of the write buffer upon determining that the amount of data stored in the write buffer and the fill rate is not sufficient.

5. The data storage device of claim 1 , wherein the controller is further configured to pause transferring the user data during the data transfer.

6. The data storage device of claim 5 , wherein the pausing occurs when the write buffer is empty.

7. The data storage device of claim 6 , wherein the controller is further configured to transfer garbage data during the pausing.

8. The data storage device of claim 7 , wherein the controller is further configured to restart transferring the user data upon determining that the write buffer is greater than a predetermined threshold and the fill rate is sufficient to continuously send user data to the memory device.

9. A data storage device, comprising:

a memory device;

a controller coupled to the memory device, wherein the controller is configured to:

deliver a continuous data strobe (DQS) signal;

determine whether an emptying rate of a read buffer is sufficient to continuously receive user data from the memory device;

evaluate timing for receiving the user data from the memory device; and

receive data from the memory device continuously with the DQS signal, wherein:

the data that is continuously received comprises user data that is sampled;

the user data that is sampled is continuously received when the read buffer is less than full;

the data that is continuously received comprises user data that is not sampled;

the user data that is not sampled is continuously received when the read buffer is full;

the user data that is sampled and the user data that is not sampled are separately received;

receiving the user data that is sampled and the user data that is not sampled is based on the determining and the evaluating;

the user data that is not sampled is received when an amount of the user data that is sampled stored in the read buffer is less than a predetermined threshold level;

the user data that is sampled is received when the amount of the user data that is sampled stored in the read buffer is greater than or equal to the predetermined threshold level; and

the predetermined threshold level is dependent on a toggle mode of the data storage device.

10. The data storage device of claim 9 , wherein the determining comprises determining whether emptying rate and replenishment rate is sufficient to prevent the read buffer from emptying.

11. The data storage device of claim 10 , wherein the controller is further configured to:

transfer the user data that is not sampled when the emptying rate and replenishment rate is not sufficient to prevent the read buffer from emptying; and

continue toggling the DQS signal during the transfer of the user data that is not sampled.

12. The data storage device of claim 9 , wherein the controller is further configured to:

stop sampling a transfer of the user data when the read buffer is full; and

start transferring the user data that is sampled from the read buffer.

13. A data storage device, comprising:

memory means; and

a controller coupled to the memory means, wherein the controller is configured to:

receive data data continuous from the memory means, wherein:

the data received comprises user data and garbage data; and

the user data and the garbage data are received separately;

send data continuous to the memory means, wherein:

the data sent comprises user data and garbage data; and

the user data and the garbage data are sent separately:

measure a fullness of a write buffer storing the data being sent and a fill rate of the write buffer, wherein:

the garbage data is sent when the fullness of the write buffer is less than a predetermined write buffer threshold level; and

the user data is sent when the fullness of the write buffer is greater than or equal to the predetermined write buffer threshold level and when the fill rate of the write buffer is greater than a write buffer fill rate threshold; and

measure a fullness of a read buffer storing data being received and an emptying rate of the read buffer, wherein:

the garbage data is received when the fullness of the read buffer is greater than a predetermined read buffer threshold level;

the user data is received when the fullness of the read buffer is less than the predetermined read buffer threshold level and when the emptying rate of the read buffer is less than a read buffer emptying rate threshold; and

the predetermined write buffer threshold level and the predetermined read buffer threshold level are dependent on a toggle mode of the data storage device.

14. The data storage device of claim 13 , wherein the write buffer is distinct from the write buffer.

15. The data storage device of claim 13 , wherein the controller comprises a flash interface module (FIM).

16. The data storage device of claim 15 , wherein the FIM comprises a scheduler unit.

17. The data storage device of claim 16 , wherein the FIM further comprises a rate fill measurer unit.

18. The data storage device of claim 13 , wherein the controller is further configured to deliver information to a rate fill measurer unit, and wherein the information comprises an amount of user data that is being delivered to the write buffer.

19. The data storage device of claim 13 , wherein the controller is further configured to deliver information to a rate fill measurer unit, and wherein the information comprises an amount of user data that is being delivered to a decoder from the read buffer.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 058426 FRAME 0815 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0679 →
SECURITY INTEREST Recorded Dec 9, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 058426/0815 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2021
From: BENISTY, SHAY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 057688/0443 →
Continuity (1)
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